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The FPCCR.TS bit is used to identify if FPU registers are considered non-secure or secure. If they are secure, then callee saved registers (S16 to S31) are stacked on exception entry or otherwise skipped. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> Signed-off-by: Yvan Roux <yvan.roux@foss.st.com> |
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aarch32.c | ||
aarch32.h | ||
aarch64-insn.c | ||
aarch64-insn.h | ||
aarch64-mte-linux.c | ||
aarch64-mte-linux.h | ||
aarch64.c | ||
aarch64.h | ||
amd64.c | ||
amd64.h | ||
arc.c | ||
arc.h | ||
arm-get-next-pcs.c | ||
arm-get-next-pcs.h | ||
arm-linux.c | ||
arm-linux.h | ||
arm.c | ||
arm.h | ||
i386.c | ||
i386.h | ||
loongarch.c | ||
loongarch.h | ||
ppc-linux-common.c | ||
ppc-linux-common.h | ||
ppc-linux-tdesc.h | ||
riscv.c | ||
riscv.h | ||
tic6x.c | ||
tic6x.h | ||
xtensa.h |