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https://sourceware.org/git/binutils-gdb.git
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0a3137ce4c
There is some inconsistency between the behaviour of objdump -D and objdump -s, both supposedly operating on all sections by default. objdump -s ignores bss sections, while objdump -D dissassembles the zeros. Fix this by making objdump -D ignore bss sections too. Furthermore, "objdump -s -j .bss" doesn't dump .bss as it should, since the user is specifically asking to look at all those zeros. This change does find some tests that used objdump -D with expected output in bss-style sections. I've updated all the msp430 tests that just wanted to find a non-empty section to look at section headers instead, making the tests slightly more stringent. The ppc xcoff and spu tests are fixed by adding -j options to objdump, which makes the tests somewhat more lenient. binutils/ * objdump.c (disassemble_section): Ignore sections without contents, unless overridden by -j. (dump_section): Allow -j to override the default of not displaying sections without contents. * doc/binutils.texi (objdump options): Update -D, -s and -j description. gas/ * testsuite/gas/ppc/xcoff-tls-32.d: Select wanted objdump sections with -j. * testsuite/gas/ppc/xcoff-tls-64.d: Likewise. ld/ * testsuite/ld-msp430-elf/main-bss-lower.d, * testsuite/ld-msp430-elf/main-bss-upper.d, * testsuite/ld-msp430-elf/main-const-lower.d, * testsuite/ld-msp430-elf/main-const-upper.d, * testsuite/ld-msp430-elf/main-text-lower.d, * testsuite/ld-msp430-elf/main-text-upper.d, * testsuite/ld-msp430-elf/main-var-lower.d, * testsuite/ld-msp430-elf/main-var-upper.d: Expect -wh output. * testsuite/ld-msp430-elf/msp430-elf.exp: Use objdump -wh rather than objdump -D or objdump -d with tests checking for non-empty given sections. * testsuite/ld-spu/ear.d, * testsuite/ld-spu/icache1.d, * testsuite/ld-spu/ovl.d, * testsuite/ld-spu/ovl2.d: Select wanted objdump sections.
180 lines
3.3 KiB
Makefile
180 lines
3.3 KiB
Makefile
#source: ovl.s
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#ld: -N -T ovl1.lnk -T ovl.lnk --emit-relocs
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#objdump: -D -r -j.text -j.ov_a1 -j.ov_a2 -j.data -j.toe -j.note.spu_name
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.*elf32-spu
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Disassembly of section \.text:
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00000100 <_start>:
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.* ai \$1,\$1,-32
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.* xor \$0,\$0,\$0
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.* stqd \$0,0\(\$1\)
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.* stqd \$0,16\(\$1\)
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.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
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.*SPU_REL16 f1_a1
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.* brsl \$0,.* <00000000\.ovl_call\.f2_a1>.*
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.*SPU_REL16 f2_a1
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.* brsl \$0,.* <00000000\.ovl_call\.f1_a2>.*
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.*SPU_REL16 f1_a2
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.* ila \$9,.*
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.*SPU_ADDR18 f2_a2
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.* bisl \$0,\$9
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.* ai \$1,\$1,32 # 20
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.* br 100 <_start> # 100
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.*SPU_REL16 _start
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0000012c <f0>:
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.* bi \$0
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#...
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[0-9a-f]+ <__ovly_return>:
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#...
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[0-9a-f]+ <__ovly_load>:
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#...
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[0-9a-f]+ <_ovly_debug_event>:
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#...
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00000330 <00000000\.ovl_call\.f1_a1>:
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.* ila \$78,1
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.* lnop
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.* ila \$79,1024 # 400
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.* bra? .* <__ovly_load>.*
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00000340 <00000000\.ovl_call\.f2_a1>:
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.* ila \$78,1
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.* lnop
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.* ila \$79,1028 # 404
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.* bra? .* <__ovly_load>.*
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00000350 <00000000.ovl_call.f1_a2>:
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.* ila \$78,2
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.* lnop
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.* ila \$79,1024 # 400
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.* bra? .* <__ovly_load>.*
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00000360 <00000000\.ovl_call\.f2_a2>:
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.* ila \$78,2
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.* lnop
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.* ila \$79,1060 # 424
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.* bra? .* <__ovly_load>.*
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00000370 <00000000\.ovl_call\.f4_a1>:
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.* ila \$78,1
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.* lnop
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.* ila \$79,1040 # 410
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.* bra? .* <__ovly_load>.*
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00000380 <00000000.ovl_call.14:8>:
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.* ila \$78,2
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.* lnop
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.* ila \$79,1076 # 434
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.* bra? .* <__ovly_load>.*
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#00000330 <00000000\.ovl_call\.f1_a1>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 04 04 00.*
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#
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#00000338 <00000000\.ovl_call\.f2_a1>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 04 04 04.*
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#
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#00000340 <00000000\.ovl_call\.f1_a2>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 08 04 00.*
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#
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#00000348 <00000000\.ovl_call\.f2_a2>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 08 04 24.*
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#
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#00000350 <00000000\.ovl_call\.f4_a1>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 04 04 10.*
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#
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#00000358 <00000000.ovl_call.14:8>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 08 04 34.*
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Disassembly of section \.ov_a1:
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00000400 <f1_a1>:
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.* br .* <f3_a1>.*
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.*SPU_REL16 f3_a1
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00000404 <f2_a1>:
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.* ila \$3,.*
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.*SPU_ADDR18 f4_a1
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.* bi \$0
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0000040c <f3_a1>:
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.* bi \$0
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00000410 <f4_a1>:
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.* bi \$0
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\.\.\.
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Disassembly of section \.ov_a2:
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00000400 <f1_a2>:
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.* stqd \$0,16\(\$1\)
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.* stqd \$1,-32\(\$1\)
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.* ai \$1,\$1,-32
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.* brsl \$0,12c <f0> # 12c
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.*SPU_REL16 f0
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.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
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.*SPU_REL16 f1_a1
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.* brsl \$0,.* <f3_a2>.*
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.*SPU_REL16 f3_a2
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.* lqd \$0,48\(\$1\) # 30
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.* ai \$1,\$1,32 # 20
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.* bi \$0
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00000424 <f2_a2>:
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.* ilhu \$3,.*
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.*SPU_ADDR16_HI f4_a2
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.* iohl \$3,.*
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.*SPU_ADDR16_LO f4_a2
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.* bi \$0
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00000430 <f3_a2>:
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.* bi \$0
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00000434 <f4_a2>:
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.* br .* <f3_a2>.*
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.*SPU_REL16 f3_a2
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\.\.\.
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Disassembly of section .data:
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00000440 <_ovly_table-0x10>:
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440: 00 00 00 00 .*
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444: 00 00 00 01 .*
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\.\.\.
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00000450 <_ovly_table>:
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450: 00 00 04 00 .*
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454: 00 00 00 20 .*
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# 458: 00 00 03 40 .*
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458: 00 00 01 00 .*
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45c: 00 00 00 01 .*
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460: 00 00 04 00 .*
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464: 00 00 00 40 .*
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# 468: 00 00 03 60 .*
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468: 00 00 01 20 .*
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46c: 00 00 00 01 .*
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00000470 <_ovly_buf_table>:
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470: 00 00 00 00 .*
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Disassembly of section \.toe:
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00000480 <_EAR_>:
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\.\.\.
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Disassembly of section \.note\.spu_name:
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.* <\.note\.spu_name>:
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.*: 00 00 00 08 .*
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.*: 00 00 00 0c .*
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.*: 00 00 00 01 .*
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.*: 53 50 55 4e .*
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.*: 41 4d 45 00 .*
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.*: 74 6d 70 64 .*
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.*: 69 72 2f 64 .*
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.*: 75 6d 70 00 .*
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