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4162bb66c6
* cgen.sh: Mark generated files read-only. * epiphany-asm.c: Regenerate. * epiphany-desc.c: Regenerate. * epiphany-desc.h: Regenerate. * epiphany-dis.c: Regenerate. * epiphany-ibld.c: Regenerate. * epiphany-opc.c: Regenerate. * epiphany-opc.h: Regenerate. * fr30-asm.c: Regenerate. * fr30-desc.c: Regenerate. * fr30-desc.h: Regenerate. * fr30-dis.c: Regenerate. * fr30-ibld.c: Regenerate. * fr30-opc.c: Regenerate. * fr30-opc.h: Regenerate. * frv-asm.c: Regenerate. * frv-desc.c: Regenerate. * frv-desc.h: Regenerate. * frv-dis.c: Regenerate. * frv-ibld.c: Regenerate. * frv-opc.c: Regenerate. * frv-opc.h: Regenerate. * ip2k-asm.c: Regenerate. * ip2k-desc.c: Regenerate. * ip2k-desc.h: Regenerate. * ip2k-dis.c: Regenerate. * ip2k-ibld.c: Regenerate. * ip2k-opc.c: Regenerate. * ip2k-opc.h: Regenerate. * iq2000-asm.c: Regenerate. * iq2000-desc.c: Regenerate. * iq2000-desc.h: Regenerate. * iq2000-dis.c: Regenerate. * iq2000-ibld.c: Regenerate. * iq2000-opc.c: Regenerate. * iq2000-opc.h: Regenerate. * lm32-asm.c: Regenerate. * lm32-desc.c: Regenerate. * lm32-desc.h: Regenerate. * lm32-dis.c: Regenerate. * lm32-ibld.c: Regenerate. * lm32-opc.c: Regenerate. * lm32-opc.h: Regenerate. * lm32-opinst.c: Regenerate. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate. * m32r-asm.c: Regenerate. * m32r-desc.c: Regenerate. * m32r-desc.h: Regenerate. * m32r-dis.c: Regenerate. * m32r-ibld.c: Regenerate. * m32r-opc.c: Regenerate. * m32r-opc.h: Regenerate. * m32r-opinst.c: Regenerate. * mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-dis.c: Regenerate. * mep-ibld.c: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate. * mt-asm.c: Regenerate. * mt-desc.c: Regenerate. * mt-desc.h: Regenerate. * mt-dis.c: Regenerate. * mt-ibld.c: Regenerate. * mt-opc.c: Regenerate. * mt-opc.h: Regenerate. * or1k-asm.c: Regenerate. * or1k-desc.c: Regenerate. * or1k-desc.h: Regenerate. * or1k-dis.c: Regenerate. * or1k-ibld.c: Regenerate. * or1k-opc.c: Regenerate. * or1k-opc.h: Regenerate. * or1k-opinst.c: Regenerate. * xc16x-asm.c: Regenerate. * xc16x-desc.c: Regenerate. * xc16x-desc.h: Regenerate. * xc16x-dis.c: Regenerate. * xc16x-ibld.c: Regenerate. * xc16x-opc.c: Regenerate. * xc16x-opc.h: Regenerate. * xstormy16-asm.c: Regenerate. * xstormy16-desc.c: Regenerate. * xstormy16-desc.h: Regenerate. * xstormy16-dis.c: Regenerate. * xstormy16-ibld.c: Regenerate. * xstormy16-opc.c: Regenerate. * xstormy16-opc.h: Regenerate.
161 lines
5.2 KiB
C
161 lines
5.2 KiB
C
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Instruction opcode header for fr30.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996-2017 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef FR30_OPC_H
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#define FR30_OPC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* -- opc.h */
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/* ??? This can be improved upon. */
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#undef CGEN_DIS_HASH_SIZE
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#define CGEN_DIS_HASH_SIZE 16
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#undef CGEN_DIS_HASH
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#define CGEN_DIS_HASH(buffer, value) (((unsigned char *) (buffer))[0] >> 4)
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/* -- */
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/* Enum declaration for fr30 instruction types. */
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typedef enum cgen_insn_type {
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FR30_INSN_INVALID, FR30_INSN_ADD, FR30_INSN_ADDI, FR30_INSN_ADD2
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, FR30_INSN_ADDC, FR30_INSN_ADDN, FR30_INSN_ADDNI, FR30_INSN_ADDN2
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, FR30_INSN_SUB, FR30_INSN_SUBC, FR30_INSN_SUBN, FR30_INSN_CMP
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, FR30_INSN_CMPI, FR30_INSN_CMP2, FR30_INSN_AND, FR30_INSN_OR
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, FR30_INSN_EOR, FR30_INSN_ANDM, FR30_INSN_ANDH, FR30_INSN_ANDB
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, FR30_INSN_ORM, FR30_INSN_ORH, FR30_INSN_ORB, FR30_INSN_EORM
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, FR30_INSN_EORH, FR30_INSN_EORB, FR30_INSN_BANDL, FR30_INSN_BORL
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, FR30_INSN_BEORL, FR30_INSN_BANDH, FR30_INSN_BORH, FR30_INSN_BEORH
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, FR30_INSN_BTSTL, FR30_INSN_BTSTH, FR30_INSN_MUL, FR30_INSN_MULU
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, FR30_INSN_MULH, FR30_INSN_MULUH, FR30_INSN_DIV0S, FR30_INSN_DIV0U
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, FR30_INSN_DIV1, FR30_INSN_DIV2, FR30_INSN_DIV3, FR30_INSN_DIV4S
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, FR30_INSN_LSL, FR30_INSN_LSLI, FR30_INSN_LSL2, FR30_INSN_LSR
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, FR30_INSN_LSRI, FR30_INSN_LSR2, FR30_INSN_ASR, FR30_INSN_ASRI
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, FR30_INSN_ASR2, FR30_INSN_LDI8, FR30_INSN_LDI20, FR30_INSN_LDI32
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, FR30_INSN_LD, FR30_INSN_LDUH, FR30_INSN_LDUB, FR30_INSN_LDR13
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, FR30_INSN_LDR13UH, FR30_INSN_LDR13UB, FR30_INSN_LDR14, FR30_INSN_LDR14UH
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, FR30_INSN_LDR14UB, FR30_INSN_LDR15, FR30_INSN_LDR15GR, FR30_INSN_LDR15DR
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, FR30_INSN_LDR15PS, FR30_INSN_ST, FR30_INSN_STH, FR30_INSN_STB
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, FR30_INSN_STR13, FR30_INSN_STR13H, FR30_INSN_STR13B, FR30_INSN_STR14
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, FR30_INSN_STR14H, FR30_INSN_STR14B, FR30_INSN_STR15, FR30_INSN_STR15GR
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, FR30_INSN_STR15DR, FR30_INSN_STR15PS, FR30_INSN_MOV, FR30_INSN_MOVDR
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, FR30_INSN_MOVPS, FR30_INSN_MOV2DR, FR30_INSN_MOV2PS, FR30_INSN_JMP
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, FR30_INSN_JMPD, FR30_INSN_CALLR, FR30_INSN_CALLRD, FR30_INSN_CALL
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, FR30_INSN_CALLD, FR30_INSN_RET, FR30_INSN_RET_D, FR30_INSN_INT
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, FR30_INSN_INTE, FR30_INSN_RETI, FR30_INSN_BRAD, FR30_INSN_BRA
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, FR30_INSN_BNOD, FR30_INSN_BNO, FR30_INSN_BEQD, FR30_INSN_BEQ
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, FR30_INSN_BNED, FR30_INSN_BNE, FR30_INSN_BCD, FR30_INSN_BC
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, FR30_INSN_BNCD, FR30_INSN_BNC, FR30_INSN_BND, FR30_INSN_BN
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, FR30_INSN_BPD, FR30_INSN_BP, FR30_INSN_BVD, FR30_INSN_BV
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, FR30_INSN_BNVD, FR30_INSN_BNV, FR30_INSN_BLTD, FR30_INSN_BLT
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, FR30_INSN_BGED, FR30_INSN_BGE, FR30_INSN_BLED, FR30_INSN_BLE
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, FR30_INSN_BGTD, FR30_INSN_BGT, FR30_INSN_BLSD, FR30_INSN_BLS
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, FR30_INSN_BHID, FR30_INSN_BHI, FR30_INSN_DMOVR13, FR30_INSN_DMOVR13H
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, FR30_INSN_DMOVR13B, FR30_INSN_DMOVR13PI, FR30_INSN_DMOVR13PIH, FR30_INSN_DMOVR13PIB
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, FR30_INSN_DMOVR15PI, FR30_INSN_DMOV2R13, FR30_INSN_DMOV2R13H, FR30_INSN_DMOV2R13B
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, FR30_INSN_DMOV2R13PI, FR30_INSN_DMOV2R13PIH, FR30_INSN_DMOV2R13PIB, FR30_INSN_DMOV2R15PD
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, FR30_INSN_LDRES, FR30_INSN_STRES, FR30_INSN_COPOP, FR30_INSN_COPLD
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, FR30_INSN_COPST, FR30_INSN_COPSV, FR30_INSN_NOP, FR30_INSN_ANDCCR
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, FR30_INSN_ORCCR, FR30_INSN_STILM, FR30_INSN_ADDSP, FR30_INSN_EXTSB
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, FR30_INSN_EXTUB, FR30_INSN_EXTSH, FR30_INSN_EXTUH, FR30_INSN_LDM0
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, FR30_INSN_LDM1, FR30_INSN_STM0, FR30_INSN_STM1, FR30_INSN_ENTER
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, FR30_INSN_LEAVE, FR30_INSN_XCHB
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} CGEN_INSN_TYPE;
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/* Index of `invalid' insn place holder. */
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#define CGEN_INSN_INVALID FR30_INSN_INVALID
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/* Total number of insns in table. */
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#define MAX_INSNS ((int) FR30_INSN_XCHB + 1)
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/* This struct records data prior to insertion or after extraction. */
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struct cgen_fields
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{
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int length;
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long f_nil;
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long f_anyof;
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long f_op1;
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long f_op2;
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long f_op3;
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long f_op4;
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long f_op5;
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long f_cc;
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long f_ccc;
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long f_Rj;
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long f_Ri;
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long f_Rs1;
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long f_Rs2;
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long f_Rjc;
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long f_Ric;
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long f_CRj;
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long f_CRi;
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long f_u4;
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long f_u4c;
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long f_i4;
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long f_m4;
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long f_u8;
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long f_i8;
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long f_i20_4;
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long f_i20_16;
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long f_i20;
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long f_i32;
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long f_udisp6;
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long f_disp8;
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long f_disp9;
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long f_disp10;
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long f_s10;
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long f_u10;
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long f_rel9;
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long f_dir8;
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long f_dir9;
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long f_dir10;
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long f_rel12;
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long f_reglist_hi_st;
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long f_reglist_low_st;
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long f_reglist_hi_ld;
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long f_reglist_low_ld;
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};
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#define CGEN_INIT_PARSE(od) \
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{\
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}
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#define CGEN_INIT_INSERT(od) \
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{\
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}
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#define CGEN_INIT_EXTRACT(od) \
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{\
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}
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#define CGEN_INIT_PRINT(od) \
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{\
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* FR30_OPC_H */
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