binutils-gdb/ld/testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d
Jan Beulich 839189bc93 RISC-V: re-arrange opcode table for consistent alias handling
For disassembly to pick up aliases in favor of underlying insns (helping
readability in the common case), the aliases need to come ahead of the
"base" insns. Slightly more code movement is needed because of insns
with the same name needing to stay next to each other.

Note that the "rorw" alias entry also has the missing INSN_ALIAS added
here.

Clone a few testcases to exercise -Mno-aliases some more, better
covering the differences between the default and that disassembly mode.
2022-09-30 10:19:00 +02:00

16 lines
415 B
Makefile

#...
Disassembly of section .plt:
#...
0+[0-9a-f]+ <(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)>:
#...
Disassembly of section .text:
#...
0+[0-9a-f]+ <foo_resolver>:
#...
0+[0-9a-f]+ <bar>:
.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.*
.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)>
.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+.*
.*:[ ]+[0-9a-f]+[ ]+(lw|ld)[ ]+.*<(\*ABS\*\+0x[0-9a-f]+@plt|foo@plt|.plt)>
#...