Alex Coplan 38cf07a6c0 aarch64: Add support for Armv8-R system registers ... This patch adds support for the system registers introduced in Armv8-R AArch64. gas/ChangeLog: 2020-09-08 Alex Coplan <alex.coplan@arm.com> * config/tc-aarch64.c (parse_sys_reg): Also pass sysreg name to validation function. (parse_sys_ins_reg): Likewise. (print_operands): Pass CPU features to aarch64_print_operand(). * testsuite/gas/aarch64/v8-r-bad-sysregs.d: New test. * testsuite/gas/aarch64/v8-r-bad-sysregs.l: Error output. * testsuite/gas/aarch64/v8-r-bad-sysregs.s: Input. * testsuite/gas/aarch64/v8-r-sysregs-need-arch.d: New test. * testsuite/gas/aarch64/v8-r-sysregs-need-arch.l: Error output. * testsuite/gas/aarch64/v8-r-sysregs.d: New test. * testsuite/gas/aarch64/v8-r-sysregs.s: Input for previous two tests. include/ChangeLog: 2020-09-08 Alex Coplan <alex.coplan@arm.com> * opcode/aarch64.h (aarch64_sys_ins_reg_supported_p): Also take system register name in order to simplify validation for v8-R. (aarch64_print_operand): Also take CPU feature set, as disassembly for system registers now depends on arch variant. opcodes/ChangeLog: 2020-09-08 Alex Coplan <alex.coplan@arm.com> * aarch64-dis.c (print_operands): Pass CPU features to aarch64_print_operand(). * aarch64-opc.c (aarch64_print_operand): Use CPU features to determine preferred disassembly of system registers. (SR_RNG): Refactor to use new SR_FEAT2 macro. (SR_FEAT2): New. (SR_V8_1_A): New. (SR_V8_4_A): New. (SR_V8_A): New. (SR_V8_R): New. (SR_EXPAND_ELx): New. (SR_EXPAND_EL12): New. (aarch64_sys_regs): Specify which registers are only on A-profile, add R-profile system registers. (ENC_BARLAR): New. (PRBARn_ELx): New. (PRLARn_ELx): New. (aarch64_sys_ins_reg_supported_p): Reject EL3 registers for Armv8-R AArch64.		2020-09-08 14:21:44 +01:00
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aout
cgen
coff	Remove powerpc PE support	2020-07-09 22:58:16 +09:30
elf	CSKY: Support attribute section.	2020-08-28 17:23:24 +08:00
gdb
mach-o	Recognize some new Mach-O load commands	2020-06-22 14:29:20 +01:00
opcode	aarch64: Add support for Armv8-R system registers	2020-09-08 14:21:44 +01:00
som	PR26457 UBSAN: som.c:1794 left shift cannot be represented	2020-08-31 20:28:09 +09:30
vms
alloca-conf.h
ansidecl.h
bfdlink.h	ld: Properly override the IR definition	2020-07-22 03:49:17 -07:00
binary-io.h
bout.h
ChangeLog	aarch64: Add support for Armv8-R system registers	2020-09-08 14:21:44 +01:00
ChangeLog-0415
ChangeLog-2016
ChangeLog-2017
ChangeLog-2018
ChangeLog-2019
ChangeLog-9103
COPYING
COPYING3
ctf-api.h	libctf, binutils, include, ld: gettextize and improve error handling	2020-08-27 13:15:43 +01:00
ctf.h	libctf: error out on corrupt CTF with invalid header flags	2020-07-22 17:57:54 +01:00
demangle.h
diagnostics.h	ada-lex.l: Ignore register diagnostic also for g++ defaulting to ISO C++17	2020-08-23 12:14:34 +02:00
dis-asm.h
dwarf2.def
dwarf2.h	For DWARF v5 Dwarf Package Files (.dwp files), the section identifier encodings have changed. This patch updates dwarf2.h to contain the new encodings. (see http://dwarfstd.org/doc/DWARF5.pdf, section 7.3.5).	2020-07-29 16:33:07 +01:00
dyn-string.h
environ.h
fibheap.h
filenames.h	Sync config, include and libiberty with GCC	2020-06-24 16:52:48 -07:00
floatformat.h
fnmatch.h
fopen-bin.h
fopen-same.h
fopen-vms.h
gcc-c-fe.def
gcc-c-interface.h
gcc-cp-fe.def
gcc-cp-interface.h
gcc-interface.h
getopt.h
hashtab.h
hp-symtab.h
leb128.h
libiberty.h	Remove the use of the register keyword in the libiberty.h header file - it is deprecated and incompatible with C++17.	2020-06-25 11:16:42 +01:00
longlong.h
lto-symtab.h
MAINTAINERS
md5.h
oasys.h
objalloc.h
obstack.h
os9k.h
partition.h
plugin-api.h
progress.h
safe-ctype.h
sha1.h
simple-object.h
sort.h
splay-tree.h
symcat.h
timeval-utils.h
vtv-change-permission.h
xregex2.h
xregex.h
xtensa-config.h
xtensa-isa-internal.h
xtensa-isa.h