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https://sourceware.org/git/binutils-gdb.git
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213516ef31
This commit is the result of running the gdb/copyright.py script, which automated the update of the copyright year range for all source files managed by the GDB project to be updated to include year 2023.
979 lines
27 KiB
C++
979 lines
27 KiB
C++
/* i387-specific utility functions, for the remote server for GDB.
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Copyright (C) 2000-2023 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "i387-fp.h"
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#include "gdbsupport/x86-xstate.h"
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static const int num_mpx_bnd_registers = 4;
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static const int num_mpx_cfg_registers = 2;
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static const int num_avx512_k_registers = 8;
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static const int num_pkeys_registers = 1;
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/* Note: These functions preserve the reserved bits in control registers.
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However, gdbserver promptly throws away that information. */
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/* These structs should have the proper sizes and alignment on both
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i386 and x86-64 machines. */
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struct i387_fsave {
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/* All these are only sixteen bits, plus padding, except for fop (which
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is only eleven bits), and fooff / fioff (which are 32 bits each). */
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unsigned short fctrl;
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unsigned short pad1;
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unsigned short fstat;
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unsigned short pad2;
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unsigned short ftag;
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unsigned short pad3;
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unsigned int fioff;
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unsigned short fiseg;
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unsigned short fop;
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unsigned int fooff;
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unsigned short foseg;
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unsigned short pad4;
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/* Space for eight 80-bit FP values. */
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unsigned char st_space[80];
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};
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struct i387_fxsave {
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/* All these are only sixteen bits, plus padding, except for fop (which
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is only eleven bits), and fooff / fioff (which are 32 bits each). */
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unsigned short fctrl;
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unsigned short fstat;
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unsigned short ftag;
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unsigned short fop;
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unsigned int fioff;
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unsigned short fiseg;
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unsigned short pad1;
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unsigned int fooff;
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unsigned short foseg;
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unsigned short pad12;
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unsigned int mxcsr;
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unsigned int pad3;
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/* Space for eight 80-bit FP values in 128-bit spaces. */
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unsigned char st_space[128];
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/* Space for eight 128-bit XMM values, or 16 on x86-64. */
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unsigned char xmm_space[256];
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};
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struct i387_xsave {
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/* All these are only sixteen bits, plus padding, except for fop (which
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is only eleven bits), and fooff / fioff (which are 32 bits each). */
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unsigned short fctrl;
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unsigned short fstat;
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unsigned short ftag;
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unsigned short fop;
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unsigned int fioff;
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unsigned short fiseg;
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unsigned short pad1;
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unsigned int fooff;
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unsigned short foseg;
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unsigned short pad12;
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unsigned int mxcsr;
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unsigned int mxcsr_mask;
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/* Space for eight 80-bit FP values in 128-bit spaces. */
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unsigned char st_space[128];
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/* Space for eight 128-bit XMM values, or 16 on x86-64. */
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unsigned char xmm_space[256];
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unsigned char reserved1[48];
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/* The extended control register 0 (the XFEATURE_ENABLED_MASK
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register). */
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unsigned long long xcr0;
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unsigned char reserved2[40];
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/* The XSTATE_BV bit vector. */
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unsigned long long xstate_bv;
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unsigned char reserved3[56];
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/* Space for eight upper 128-bit YMM values, or 16 on x86-64. */
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unsigned char ymmh_space[256];
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unsigned char reserved4[128];
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/* Space for 4 bound registers values of 128 bits. */
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unsigned char mpx_bnd_space[64];
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/* Space for 2 MPX configuration registers of 64 bits
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plus reserved space. */
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unsigned char mpx_cfg_space[16];
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unsigned char reserved5[48];
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/* Space for 8 OpMask register values of 64 bits. */
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unsigned char k_space[64];
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/* Space for 16 256-bit zmm0-15. */
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unsigned char zmmh_low_space[512];
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/* Space for 16 512-bit zmm16-31 values. */
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unsigned char zmmh_high_space[1024];
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/* Space for 1 32-bit PKRU register. The HW XSTATE size for this feature is
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actually 64 bits, but WRPKRU/RDPKRU instructions ignore upper 32 bits. */
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unsigned char pkru_space[8];
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};
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void
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i387_cache_to_fsave (struct regcache *regcache, void *buf)
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{
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struct i387_fsave *fp = (struct i387_fsave *) buf;
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int i;
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int st0_regnum = find_regno (regcache->tdesc, "st0");
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unsigned long val2;
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for (i = 0; i < 8; i++)
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collect_register (regcache, i + st0_regnum,
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((char *) &fp->st_space[0]) + i * 10);
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fp->fioff = regcache_raw_get_unsigned_by_name (regcache, "fioff");
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fp->fooff = regcache_raw_get_unsigned_by_name (regcache, "fooff");
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/* This one's 11 bits... */
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val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
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fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800);
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/* Some registers are 16-bit. */
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fp->fctrl = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
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fp->fstat = regcache_raw_get_unsigned_by_name (regcache, "fstat");
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fp->ftag = regcache_raw_get_unsigned_by_name (regcache, "ftag");
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fp->fiseg = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
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fp->foseg = regcache_raw_get_unsigned_by_name (regcache, "foseg");
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}
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void
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i387_fsave_to_cache (struct regcache *regcache, const void *buf)
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{
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struct i387_fsave *fp = (struct i387_fsave *) buf;
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int i;
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int st0_regnum = find_regno (regcache->tdesc, "st0");
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unsigned long val;
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for (i = 0; i < 8; i++)
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supply_register (regcache, i + st0_regnum,
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((char *) &fp->st_space[0]) + i * 10);
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supply_register_by_name (regcache, "fioff", &fp->fioff);
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supply_register_by_name (regcache, "fooff", &fp->fooff);
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/* Some registers are 16-bit. */
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val = fp->fctrl & 0xFFFF;
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supply_register_by_name (regcache, "fctrl", &val);
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val = fp->fstat & 0xFFFF;
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supply_register_by_name (regcache, "fstat", &val);
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val = fp->ftag & 0xFFFF;
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supply_register_by_name (regcache, "ftag", &val);
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val = fp->fiseg & 0xFFFF;
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supply_register_by_name (regcache, "fiseg", &val);
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val = fp->foseg & 0xFFFF;
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supply_register_by_name (regcache, "foseg", &val);
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/* fop has only 11 valid bits. */
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val = (fp->fop) & 0x7FF;
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supply_register_by_name (regcache, "fop", &val);
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}
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void
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i387_cache_to_fxsave (struct regcache *regcache, void *buf)
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{
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struct i387_fxsave *fp = (struct i387_fxsave *) buf;
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int i;
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int st0_regnum = find_regno (regcache->tdesc, "st0");
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int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
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unsigned long val, val2;
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/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
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int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
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for (i = 0; i < 8; i++)
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collect_register (regcache, i + st0_regnum,
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((char *) &fp->st_space[0]) + i * 16);
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for (i = 0; i < num_xmm_registers; i++)
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collect_register (regcache, i + xmm0_regnum,
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((char *) &fp->xmm_space[0]) + i * 16);
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fp->fioff = regcache_raw_get_unsigned_by_name (regcache, "fioff");
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fp->fooff = regcache_raw_get_unsigned_by_name (regcache, "fooff");
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fp->mxcsr = regcache_raw_get_unsigned_by_name (regcache, "mxcsr");
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/* This one's 11 bits... */
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val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
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fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800);
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/* Some registers are 16-bit. */
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fp->fctrl = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
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fp->fstat = regcache_raw_get_unsigned_by_name (regcache, "fstat");
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/* Convert to the simplifed tag form stored in fxsave data. */
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val = regcache_raw_get_unsigned_by_name (regcache, "ftag");
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val2 = 0;
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for (i = 7; i >= 0; i--)
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{
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int tag = (val >> (i * 2)) & 3;
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if (tag != 3)
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val2 |= (1 << i);
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}
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fp->ftag = val2;
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fp->fiseg = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
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fp->foseg = regcache_raw_get_unsigned_by_name (regcache, "foseg");
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}
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void
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i387_cache_to_xsave (struct regcache *regcache, void *buf)
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{
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struct i387_xsave *fp = (struct i387_xsave *) buf;
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bool amd64 = register_size (regcache->tdesc, 0) == 8;
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int i;
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unsigned long val, val2;
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unsigned long long xstate_bv = 0;
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unsigned long long clear_bv = 0;
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char raw[64];
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char *p;
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/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
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int num_xmm_registers = amd64 ? 16 : 8;
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/* AVX512 extends the existing xmm/ymm registers to a wider mode: zmm. */
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int num_avx512_zmmh_low_registers = num_xmm_registers;
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/* AVX512 adds 16 extra regs in Amd64 mode, but none in I386 mode.*/
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int num_avx512_zmmh_high_registers = amd64 ? 16 : 0;
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int num_avx512_ymmh_registers = amd64 ? 16 : 0;
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int num_avx512_xmm_registers = amd64 ? 16 : 0;
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/* The supported bits in `xstat_bv' are 8 bytes. Clear part in
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vector registers if its bit in xstat_bv is zero. */
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clear_bv = (~fp->xstate_bv) & x86_xcr0;
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/* Clear part in x87 and vector registers if its bit in xstat_bv is
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zero. */
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if (clear_bv)
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{
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if ((clear_bv & X86_XSTATE_X87))
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{
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for (i = 0; i < 8; i++)
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memset (((char *) &fp->st_space[0]) + i * 16, 0, 10);
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fp->fioff = 0;
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fp->fooff = 0;
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fp->fctrl = I387_FCTRL_INIT_VAL;
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fp->fstat = 0;
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fp->ftag = 0;
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fp->fiseg = 0;
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fp->foseg = 0;
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fp->fop = 0;
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}
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if ((clear_bv & X86_XSTATE_SSE))
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for (i = 0; i < num_xmm_registers; i++)
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memset (((char *) &fp->xmm_space[0]) + i * 16, 0, 16);
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if ((clear_bv & X86_XSTATE_AVX))
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for (i = 0; i < num_xmm_registers; i++)
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memset (((char *) &fp->ymmh_space[0]) + i * 16, 0, 16);
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if ((clear_bv & X86_XSTATE_SSE) && (clear_bv & X86_XSTATE_AVX))
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memset (((char *) &fp->mxcsr), 0, 4);
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if ((clear_bv & X86_XSTATE_BNDREGS))
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for (i = 0; i < num_mpx_bnd_registers; i++)
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memset (((char *) &fp->mpx_bnd_space[0]) + i * 16, 0, 16);
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if ((clear_bv & X86_XSTATE_BNDCFG))
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for (i = 0; i < num_mpx_cfg_registers; i++)
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memset (((char *) &fp->mpx_cfg_space[0]) + i * 8, 0, 8);
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if ((clear_bv & X86_XSTATE_K))
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for (i = 0; i < num_avx512_k_registers; i++)
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memset (((char *) &fp->k_space[0]) + i * 8, 0, 8);
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if ((clear_bv & X86_XSTATE_ZMM_H))
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for (i = 0; i < num_avx512_zmmh_low_registers; i++)
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memset (((char *) &fp->zmmh_low_space[0]) + i * 32, 0, 32);
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if ((clear_bv & X86_XSTATE_ZMM))
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{
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for (i = 0; i < num_avx512_zmmh_high_registers; i++)
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memset (((char *) &fp->zmmh_low_space[0]) + 32 + i * 64, 0, 32);
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for (i = 0; i < num_avx512_xmm_registers; i++)
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memset (((char *) &fp->zmmh_high_space[0]) + i * 64, 0, 16);
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for (i = 0; i < num_avx512_ymmh_registers; i++)
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memset (((char *) &fp->zmmh_high_space[0]) + 16 + i * 64, 0, 16);
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}
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if ((clear_bv & X86_XSTATE_PKRU))
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for (i = 0; i < num_pkeys_registers; i++)
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memset (((char *) &fp->pkru_space[0]) + i * 4, 0, 4);
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}
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/* Check if any x87 registers are changed. */
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if ((x86_xcr0 & X86_XSTATE_X87))
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{
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int st0_regnum = find_regno (regcache->tdesc, "st0");
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for (i = 0; i < 8; i++)
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{
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collect_register (regcache, i + st0_regnum, raw);
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p = ((char *) &fp->st_space[0]) + i * 16;
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if (memcmp (raw, p, 10))
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{
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xstate_bv |= X86_XSTATE_X87;
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memcpy (p, raw, 10);
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}
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}
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}
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/* Check if any SSE registers are changed. */
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if ((x86_xcr0 & X86_XSTATE_SSE))
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{
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int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
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for (i = 0; i < num_xmm_registers; i++)
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{
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collect_register (regcache, i + xmm0_regnum, raw);
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p = ((char *) &fp->xmm_space[0]) + i * 16;
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if (memcmp (raw, p, 16))
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{
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xstate_bv |= X86_XSTATE_SSE;
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memcpy (p, raw, 16);
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}
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}
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}
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/* Check if any AVX registers are changed. */
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if ((x86_xcr0 & X86_XSTATE_AVX))
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{
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int ymm0h_regnum = find_regno (regcache->tdesc, "ymm0h");
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for (i = 0; i < num_xmm_registers; i++)
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{
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collect_register (regcache, i + ymm0h_regnum, raw);
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p = ((char *) &fp->ymmh_space[0]) + i * 16;
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if (memcmp (raw, p, 16))
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{
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xstate_bv |= X86_XSTATE_AVX;
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memcpy (p, raw, 16);
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}
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}
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}
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/* Check if any bound register has changed. */
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if ((x86_xcr0 & X86_XSTATE_BNDREGS))
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{
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int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
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for (i = 0; i < num_mpx_bnd_registers; i++)
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{
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collect_register (regcache, i + bnd0r_regnum, raw);
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p = ((char *) &fp->mpx_bnd_space[0]) + i * 16;
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if (memcmp (raw, p, 16))
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{
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xstate_bv |= X86_XSTATE_BNDREGS;
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memcpy (p, raw, 16);
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}
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}
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}
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/* Check if any status register has changed. */
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if ((x86_xcr0 & X86_XSTATE_BNDCFG))
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{
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int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
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for (i = 0; i < num_mpx_cfg_registers; i++)
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{
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collect_register (regcache, i + bndcfg_regnum, raw);
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p = ((char *) &fp->mpx_cfg_space[0]) + i * 8;
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if (memcmp (raw, p, 8))
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{
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xstate_bv |= X86_XSTATE_BNDCFG;
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memcpy (p, raw, 8);
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}
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}
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}
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/* Check if any K registers are changed. */
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if ((x86_xcr0 & X86_XSTATE_K))
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{
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int k0_regnum = find_regno (regcache->tdesc, "k0");
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for (i = 0; i < num_avx512_k_registers; i++)
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{
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collect_register (regcache, i + k0_regnum, raw);
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p = ((char *) &fp->k_space[0]) + i * 8;
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if (memcmp (raw, p, 8) != 0)
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{
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xstate_bv |= X86_XSTATE_K;
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memcpy (p, raw, 8);
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}
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}
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}
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/* Check if any of ZMM0H-ZMM15H registers are changed. */
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if ((x86_xcr0 & X86_XSTATE_ZMM_H))
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{
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int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h");
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for (i = 0; i < num_avx512_zmmh_low_registers; i++)
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{
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collect_register (regcache, i + zmm0h_regnum, raw);
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p = ((char *) &fp->zmmh_low_space[0]) + i * 32;
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if (memcmp (raw, p, 32) != 0)
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{
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xstate_bv |= X86_XSTATE_ZMM_H;
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memcpy (p, raw, 32);
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}
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}
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}
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/* Check if any of ZMM16H-ZMM31H registers are changed. */
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|
if ((x86_xcr0 & X86_XSTATE_ZMM))
|
|
{
|
|
int zmm16h_regnum = (num_avx512_zmmh_high_registers == 0
|
|
? -1
|
|
: find_regno (regcache->tdesc, "zmm16h"));
|
|
|
|
for (i = 0; i < num_avx512_zmmh_high_registers; i++)
|
|
{
|
|
collect_register (regcache, i + zmm16h_regnum, raw);
|
|
p = ((char *) &fp->zmmh_high_space[0]) + 32 + i * 64;
|
|
if (memcmp (raw, p, 32) != 0)
|
|
{
|
|
xstate_bv |= X86_XSTATE_ZMM;
|
|
memcpy (p, raw, 32);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Check if any XMM_AVX512 registers are changed. */
|
|
if ((x86_xcr0 & X86_XSTATE_ZMM))
|
|
{
|
|
int xmm_avx512_regnum = (num_avx512_xmm_registers == 0
|
|
? -1
|
|
: find_regno (regcache->tdesc, "xmm16"));
|
|
|
|
for (i = 0; i < num_avx512_xmm_registers; i++)
|
|
{
|
|
collect_register (regcache, i + xmm_avx512_regnum, raw);
|
|
p = ((char *) &fp->zmmh_high_space[0]) + i * 64;
|
|
if (memcmp (raw, p, 16) != 0)
|
|
{
|
|
xstate_bv |= X86_XSTATE_ZMM;
|
|
memcpy (p, raw, 16);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Check if any YMMH_AVX512 registers are changed. */
|
|
if ((x86_xcr0 & X86_XSTATE_ZMM))
|
|
{
|
|
int ymmh_avx512_regnum = (num_avx512_ymmh_registers == 0
|
|
? -1
|
|
: find_regno (regcache->tdesc, "ymm16h"));
|
|
|
|
for (i = 0; i < num_avx512_ymmh_registers; i++)
|
|
{
|
|
collect_register (regcache, i + ymmh_avx512_regnum, raw);
|
|
p = ((char *) &fp->zmmh_high_space[0]) + 16 + i * 64;
|
|
if (memcmp (raw, p, 16) != 0)
|
|
{
|
|
xstate_bv |= X86_XSTATE_ZMM;
|
|
memcpy (p, raw, 16);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Check if any PKEYS registers are changed. */
|
|
if ((x86_xcr0 & X86_XSTATE_PKRU))
|
|
{
|
|
int pkru_regnum = find_regno (regcache->tdesc, "pkru");
|
|
|
|
for (i = 0; i < num_pkeys_registers; i++)
|
|
{
|
|
collect_register (regcache, i + pkru_regnum, raw);
|
|
p = ((char *) &fp->pkru_space[0]) + i * 4;
|
|
if (memcmp (raw, p, 4) != 0)
|
|
{
|
|
xstate_bv |= X86_XSTATE_PKRU;
|
|
memcpy (p, raw, 4);
|
|
}
|
|
}
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_SSE) || (x86_xcr0 & X86_XSTATE_AVX))
|
|
{
|
|
collect_register_by_name (regcache, "mxcsr", raw);
|
|
if (memcmp (raw, &fp->mxcsr, 4) != 0)
|
|
{
|
|
if (((fp->xstate_bv | xstate_bv)
|
|
& (X86_XSTATE_SSE | X86_XSTATE_AVX)) == 0)
|
|
xstate_bv |= X86_XSTATE_SSE;
|
|
memcpy (&fp->mxcsr, raw, 4);
|
|
}
|
|
}
|
|
|
|
if (x86_xcr0 & X86_XSTATE_X87)
|
|
{
|
|
collect_register_by_name (regcache, "fioff", raw);
|
|
if (memcmp (raw, &fp->fioff, 4) != 0)
|
|
{
|
|
xstate_bv |= X86_XSTATE_X87;
|
|
memcpy (&fp->fioff, raw, 4);
|
|
}
|
|
|
|
collect_register_by_name (regcache, "fooff", raw);
|
|
if (memcmp (raw, &fp->fooff, 4) != 0)
|
|
{
|
|
xstate_bv |= X86_XSTATE_X87;
|
|
memcpy (&fp->fooff, raw, 4);
|
|
}
|
|
|
|
/* This one's 11 bits... */
|
|
val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
|
|
val2 = (val2 & 0x7FF) | (fp->fop & 0xF800);
|
|
if (fp->fop != val2)
|
|
{
|
|
xstate_bv |= X86_XSTATE_X87;
|
|
fp->fop = val2;
|
|
}
|
|
|
|
/* Some registers are 16-bit. */
|
|
val = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
|
|
if (fp->fctrl != val)
|
|
{
|
|
xstate_bv |= X86_XSTATE_X87;
|
|
fp->fctrl = val;
|
|
}
|
|
|
|
val = regcache_raw_get_unsigned_by_name (regcache, "fstat");
|
|
if (fp->fstat != val)
|
|
{
|
|
xstate_bv |= X86_XSTATE_X87;
|
|
fp->fstat = val;
|
|
}
|
|
|
|
/* Convert to the simplifed tag form stored in fxsave data. */
|
|
val = regcache_raw_get_unsigned_by_name (regcache, "ftag");
|
|
val2 = 0;
|
|
for (i = 7; i >= 0; i--)
|
|
{
|
|
int tag = (val >> (i * 2)) & 3;
|
|
|
|
if (tag != 3)
|
|
val2 |= (1 << i);
|
|
}
|
|
if (fp->ftag != val2)
|
|
{
|
|
xstate_bv |= X86_XSTATE_X87;
|
|
fp->ftag = val2;
|
|
}
|
|
|
|
val = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
|
|
if (fp->fiseg != val)
|
|
{
|
|
xstate_bv |= X86_XSTATE_X87;
|
|
fp->fiseg = val;
|
|
}
|
|
|
|
val = regcache_raw_get_unsigned_by_name (regcache, "foseg");
|
|
if (fp->foseg != val)
|
|
{
|
|
xstate_bv |= X86_XSTATE_X87;
|
|
fp->foseg = val;
|
|
}
|
|
}
|
|
|
|
/* Update the corresponding bits in xstate_bv if any SSE/AVX
|
|
registers are changed. */
|
|
fp->xstate_bv |= xstate_bv;
|
|
}
|
|
|
|
static int
|
|
i387_ftag (struct i387_fxsave *fp, int regno)
|
|
{
|
|
unsigned char *raw = &fp->st_space[regno * 16];
|
|
unsigned int exponent;
|
|
unsigned long fraction[2];
|
|
int integer;
|
|
|
|
integer = raw[7] & 0x80;
|
|
exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
|
|
fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
|
|
fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
|
|
| (raw[5] << 8) | raw[4]);
|
|
|
|
if (exponent == 0x7fff)
|
|
{
|
|
/* Special. */
|
|
return (2);
|
|
}
|
|
else if (exponent == 0x0000)
|
|
{
|
|
if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
|
|
{
|
|
/* Zero. */
|
|
return (1);
|
|
}
|
|
else
|
|
{
|
|
/* Special. */
|
|
return (2);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (integer)
|
|
{
|
|
/* Valid. */
|
|
return (0);
|
|
}
|
|
else
|
|
{
|
|
/* Special. */
|
|
return (2);
|
|
}
|
|
}
|
|
}
|
|
|
|
void
|
|
i387_fxsave_to_cache (struct regcache *regcache, const void *buf)
|
|
{
|
|
struct i387_fxsave *fp = (struct i387_fxsave *) buf;
|
|
int i, top;
|
|
int st0_regnum = find_regno (regcache->tdesc, "st0");
|
|
int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
|
|
unsigned long val;
|
|
/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
|
|
int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
|
|
|
|
for (i = 0; i < 8; i++)
|
|
supply_register (regcache, i + st0_regnum,
|
|
((char *) &fp->st_space[0]) + i * 16);
|
|
for (i = 0; i < num_xmm_registers; i++)
|
|
supply_register (regcache, i + xmm0_regnum,
|
|
((char *) &fp->xmm_space[0]) + i * 16);
|
|
|
|
supply_register_by_name (regcache, "fioff", &fp->fioff);
|
|
supply_register_by_name (regcache, "fooff", &fp->fooff);
|
|
supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
|
|
|
|
/* Some registers are 16-bit. */
|
|
val = fp->fctrl & 0xFFFF;
|
|
supply_register_by_name (regcache, "fctrl", &val);
|
|
|
|
val = fp->fstat & 0xFFFF;
|
|
supply_register_by_name (regcache, "fstat", &val);
|
|
|
|
/* Generate the form of ftag data that GDB expects. */
|
|
top = (fp->fstat >> 11) & 0x7;
|
|
val = 0;
|
|
for (i = 7; i >= 0; i--)
|
|
{
|
|
int tag;
|
|
if (fp->ftag & (1 << i))
|
|
tag = i387_ftag (fp, (i + 8 - top) % 8);
|
|
else
|
|
tag = 3;
|
|
val |= tag << (2 * i);
|
|
}
|
|
supply_register_by_name (regcache, "ftag", &val);
|
|
|
|
val = fp->fiseg & 0xFFFF;
|
|
supply_register_by_name (regcache, "fiseg", &val);
|
|
|
|
val = fp->foseg & 0xFFFF;
|
|
supply_register_by_name (regcache, "foseg", &val);
|
|
|
|
val = (fp->fop) & 0x7FF;
|
|
supply_register_by_name (regcache, "fop", &val);
|
|
}
|
|
|
|
void
|
|
i387_xsave_to_cache (struct regcache *regcache, const void *buf)
|
|
{
|
|
struct i387_xsave *fp = (struct i387_xsave *) buf;
|
|
struct i387_fxsave *fxp = (struct i387_fxsave *) buf;
|
|
bool amd64 = register_size (regcache->tdesc, 0) == 8;
|
|
int i, top;
|
|
unsigned long val;
|
|
unsigned long long clear_bv;
|
|
gdb_byte *p;
|
|
|
|
/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
|
|
int num_xmm_registers = amd64 ? 16 : 8;
|
|
/* AVX512 extends the existing xmm/ymm registers to a wider mode: zmm. */
|
|
int num_avx512_zmmh_low_registers = num_xmm_registers;
|
|
/* AVX512 adds 16 extra regs in Amd64 mode, but none in I386 mode.*/
|
|
int num_avx512_zmmh_high_registers = amd64 ? 16 : 0;
|
|
int num_avx512_ymmh_registers = amd64 ? 16 : 0;
|
|
int num_avx512_xmm_registers = amd64 ? 16 : 0;
|
|
|
|
/* The supported bits in `xstat_bv' are 8 bytes. Clear part in
|
|
vector registers if its bit in xstat_bv is zero. */
|
|
clear_bv = (~fp->xstate_bv) & x86_xcr0;
|
|
|
|
/* Check if any x87 registers are changed. */
|
|
if ((x86_xcr0 & X86_XSTATE_X87) != 0)
|
|
{
|
|
int st0_regnum = find_regno (regcache->tdesc, "st0");
|
|
|
|
if ((clear_bv & X86_XSTATE_X87) != 0)
|
|
{
|
|
for (i = 0; i < 8; i++)
|
|
supply_register_zeroed (regcache, i + st0_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->st_space[0];
|
|
for (i = 0; i < 8; i++)
|
|
supply_register (regcache, i + st0_regnum, p + i * 16);
|
|
}
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_SSE) != 0)
|
|
{
|
|
int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
|
|
|
|
if ((clear_bv & X86_XSTATE_SSE))
|
|
{
|
|
for (i = 0; i < num_xmm_registers; i++)
|
|
supply_register_zeroed (regcache, i + xmm0_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->xmm_space[0];
|
|
for (i = 0; i < num_xmm_registers; i++)
|
|
supply_register (regcache, i + xmm0_regnum, p + i * 16);
|
|
}
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_AVX) != 0)
|
|
{
|
|
int ymm0h_regnum = find_regno (regcache->tdesc, "ymm0h");
|
|
|
|
if ((clear_bv & X86_XSTATE_AVX) != 0)
|
|
{
|
|
for (i = 0; i < num_xmm_registers; i++)
|
|
supply_register_zeroed (regcache, i + ymm0h_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->ymmh_space[0];
|
|
for (i = 0; i < num_xmm_registers; i++)
|
|
supply_register (regcache, i + ymm0h_regnum, p + i * 16);
|
|
}
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_BNDREGS))
|
|
{
|
|
int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
|
|
|
|
|
|
if ((clear_bv & X86_XSTATE_BNDREGS) != 0)
|
|
{
|
|
for (i = 0; i < num_mpx_bnd_registers; i++)
|
|
supply_register_zeroed (regcache, i + bnd0r_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->mpx_bnd_space[0];
|
|
for (i = 0; i < num_mpx_bnd_registers; i++)
|
|
supply_register (regcache, i + bnd0r_regnum, p + i * 16);
|
|
}
|
|
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_BNDCFG))
|
|
{
|
|
int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
|
|
|
|
if ((clear_bv & X86_XSTATE_BNDCFG) != 0)
|
|
{
|
|
for (i = 0; i < num_mpx_cfg_registers; i++)
|
|
supply_register_zeroed (regcache, i + bndcfg_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->mpx_cfg_space[0];
|
|
for (i = 0; i < num_mpx_cfg_registers; i++)
|
|
supply_register (regcache, i + bndcfg_regnum, p + i * 8);
|
|
}
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_K) != 0)
|
|
{
|
|
int k0_regnum = find_regno (regcache->tdesc, "k0");
|
|
|
|
if ((clear_bv & X86_XSTATE_K) != 0)
|
|
{
|
|
for (i = 0; i < num_avx512_k_registers; i++)
|
|
supply_register_zeroed (regcache, i + k0_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->k_space[0];
|
|
for (i = 0; i < num_avx512_k_registers; i++)
|
|
supply_register (regcache, i + k0_regnum, p + i * 8);
|
|
}
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_ZMM_H) != 0)
|
|
{
|
|
int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h");
|
|
|
|
if ((clear_bv & X86_XSTATE_ZMM_H) != 0)
|
|
{
|
|
for (i = 0; i < num_avx512_zmmh_low_registers; i++)
|
|
supply_register_zeroed (regcache, i + zmm0h_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->zmmh_low_space[0];
|
|
for (i = 0; i < num_avx512_zmmh_low_registers; i++)
|
|
supply_register (regcache, i + zmm0h_regnum, p + i * 32);
|
|
}
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_ZMM) != 0)
|
|
{
|
|
int zmm16h_regnum = (num_avx512_zmmh_high_registers == 0
|
|
? -1
|
|
: find_regno (regcache->tdesc, "zmm16h"));
|
|
int ymm16h_regnum = (num_avx512_ymmh_registers == 0
|
|
? -1
|
|
: find_regno (regcache->tdesc, "ymm16h"));
|
|
int xmm16_regnum = (num_avx512_xmm_registers == 0
|
|
? -1
|
|
: find_regno (regcache->tdesc, "xmm16"));
|
|
|
|
if ((clear_bv & X86_XSTATE_ZMM) != 0)
|
|
{
|
|
for (i = 0; i < num_avx512_zmmh_high_registers; i++)
|
|
supply_register_zeroed (regcache, i + zmm16h_regnum);
|
|
for (i = 0; i < num_avx512_ymmh_registers; i++)
|
|
supply_register_zeroed (regcache, i + ymm16h_regnum);
|
|
for (i = 0; i < num_avx512_xmm_registers; i++)
|
|
supply_register_zeroed (regcache, i + xmm16_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->zmmh_high_space[0];
|
|
for (i = 0; i < num_avx512_zmmh_high_registers; i++)
|
|
supply_register (regcache, i + zmm16h_regnum, p + 32 + i * 64);
|
|
for (i = 0; i < num_avx512_ymmh_registers; i++)
|
|
supply_register (regcache, i + ymm16h_regnum, p + 16 + i * 64);
|
|
for (i = 0; i < num_avx512_xmm_registers; i++)
|
|
supply_register (regcache, i + xmm16_regnum, p + i * 64);
|
|
}
|
|
}
|
|
|
|
if ((x86_xcr0 & X86_XSTATE_PKRU) != 0)
|
|
{
|
|
int pkru_regnum = find_regno (regcache->tdesc, "pkru");
|
|
|
|
if ((clear_bv & X86_XSTATE_PKRU) != 0)
|
|
{
|
|
for (i = 0; i < num_pkeys_registers; i++)
|
|
supply_register_zeroed (regcache, i + pkru_regnum);
|
|
}
|
|
else
|
|
{
|
|
p = (gdb_byte *) &fp->pkru_space[0];
|
|
for (i = 0; i < num_pkeys_registers; i++)
|
|
supply_register (regcache, i + pkru_regnum, p + i * 4);
|
|
}
|
|
}
|
|
|
|
if ((clear_bv & (X86_XSTATE_SSE | X86_XSTATE_AVX))
|
|
== (X86_XSTATE_SSE | X86_XSTATE_AVX))
|
|
{
|
|
unsigned int default_mxcsr = I387_MXCSR_INIT_VAL;
|
|
supply_register_by_name (regcache, "mxcsr", &default_mxcsr);
|
|
}
|
|
else
|
|
supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
|
|
|
|
if ((clear_bv & X86_XSTATE_X87) != 0)
|
|
{
|
|
supply_register_by_name_zeroed (regcache, "fioff");
|
|
supply_register_by_name_zeroed (regcache, "fooff");
|
|
|
|
val = I387_FCTRL_INIT_VAL;
|
|
supply_register_by_name (regcache, "fctrl", &val);
|
|
|
|
supply_register_by_name_zeroed (regcache, "fstat");
|
|
|
|
val = 0xFFFF;
|
|
supply_register_by_name (regcache, "ftag", &val);
|
|
|
|
supply_register_by_name_zeroed (regcache, "fiseg");
|
|
supply_register_by_name_zeroed (regcache, "foseg");
|
|
supply_register_by_name_zeroed (regcache, "fop");
|
|
}
|
|
else
|
|
{
|
|
supply_register_by_name (regcache, "fioff", &fp->fioff);
|
|
supply_register_by_name (regcache, "fooff", &fp->fooff);
|
|
|
|
/* Some registers are 16-bit. */
|
|
val = fp->fctrl & 0xFFFF;
|
|
supply_register_by_name (regcache, "fctrl", &val);
|
|
|
|
val = fp->fstat & 0xFFFF;
|
|
supply_register_by_name (regcache, "fstat", &val);
|
|
|
|
/* Generate the form of ftag data that GDB expects. */
|
|
top = (fp->fstat >> 11) & 0x7;
|
|
val = 0;
|
|
for (i = 7; i >= 0; i--)
|
|
{
|
|
int tag;
|
|
if (fp->ftag & (1 << i))
|
|
tag = i387_ftag (fxp, (i + 8 - top) % 8);
|
|
else
|
|
tag = 3;
|
|
val |= tag << (2 * i);
|
|
}
|
|
supply_register_by_name (regcache, "ftag", &val);
|
|
|
|
val = fp->fiseg & 0xFFFF;
|
|
supply_register_by_name (regcache, "fiseg", &val);
|
|
|
|
val = fp->foseg & 0xFFFF;
|
|
supply_register_by_name (regcache, "foseg", &val);
|
|
|
|
val = (fp->fop) & 0x7FF;
|
|
supply_register_by_name (regcache, "fop", &val);
|
|
}
|
|
}
|
|
|
|
/* Default to SSE. */
|
|
unsigned long long x86_xcr0 = X86_XSTATE_SSE_MASK;
|