mirror of
https://sourceware.org/git/binutils-gdb.git
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1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
127 lines
3.8 KiB
C
127 lines
3.8 KiB
C
/* Ravenscar PowerPC target support.
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Copyright (C) 2011-2024 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "ppc-tdep.h"
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#include "inferior.h"
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#include "ravenscar-thread.h"
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#include "ppc-ravenscar-thread.h"
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#define NO_OFFSET -1
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/* See ppc-tdep.h for register numbers. */
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static const int powerpc_context_offsets[] =
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{
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/* R0 - R32 */
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NO_OFFSET, 0, 4, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, 8, 12, 16,
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20, 24, 28, 32,
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36, 40, 44, 48,
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52, 56, 60, 64,
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68, 72, 76, 80,
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/* F0 - F31 */
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, 96, 104,
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112, 120, 128, 136,
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144, 152, 160, 168,
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176, 184, 192, 200,
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208, 216, 224, 232,
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/* PC, MSR, CR, LR */
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88, NO_OFFSET, 84, NO_OFFSET,
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/* CTR, XER, FPSCR */
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NO_OFFSET, NO_OFFSET, 240
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};
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static const int e500_context_offsets[] =
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{
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/* R0 - R32 */
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NO_OFFSET, 4, 12, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, 20, 28, 36,
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44, 52, 60, 68,
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76, 84, 92, 100,
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108, 116, 124, 132,
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140, 148, 156, 164,
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/* F0 - F31 */
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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/* PC, MSR, CR, LR */
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172, NO_OFFSET, 168, NO_OFFSET,
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/* CTR, XER, FPSCR, MQ */
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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/* Upper R0-R32. */
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NO_OFFSET, 0, 8, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET,
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NO_OFFSET, 16, 24, 32,
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40, 48, 56, 64,
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72, 80, 88, 96,
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104, 112, 120, 128,
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136, 144, 152, 160,
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/* ACC, FSCR */
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NO_OFFSET, 176
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};
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/* The ravenscar_arch_ops vector for most PowerPC targets. */
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static struct ravenscar_arch_ops ppc_ravenscar_powerpc_ops
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(powerpc_context_offsets);
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/* Register ppc_ravenscar_powerpc_ops in GDBARCH. */
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void
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register_ppc_ravenscar_ops (struct gdbarch *gdbarch)
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{
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set_gdbarch_ravenscar_ops (gdbarch, &ppc_ravenscar_powerpc_ops);
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}
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/* The ravenscar_arch_ops vector for E500 targets. */
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static struct ravenscar_arch_ops ppc_ravenscar_e500_ops (e500_context_offsets);
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/* Register ppc_ravenscar_e500_ops in GDBARCH. */
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void
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register_e500_ravenscar_ops (struct gdbarch *gdbarch)
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{
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set_gdbarch_ravenscar_ops (gdbarch, &ppc_ravenscar_e500_ops);
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}
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