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https://sourceware.org/git/binutils-gdb.git
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9a23f96e91
In the TLS GD/LD to LE optimization, ld replaces a sequence like addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x R_PPC64_REL24 __tls_get_addr nop with addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x nop When the tprel offset is small, this can be further optimized to nop addi 3,13,x@tprel nop bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt. (ppc64_elf_tls_optimize): Set it. (ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when addis would add zero. * elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt. (ppc_elf_tls_optimize): Set it. (ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO relocs to use r2 when addis would add zero. gold/ * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS relocs to use r2/r13 when addis would add zero. ld/ * testsuite/ld-powerpc/tls.s: Add calls with tls markers. * testsuite/ld-powerpc/tls32.s: Likewise. * testsuite/ld-powerpc/powerpc.exp: Run tls marker tests. * testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization. * testsuite/ld-powerpc/tlsexe.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/tlsmark.d: Likewise. * testsuite/ld-powerpc/tlsopt4.d: Likewise. * testsuite/ld-powerpc/tlstoc.d: Likewise.
38 lines
1.1 KiB
Makefile
38 lines
1.1 KiB
Makefile
#source: tlslib.s
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#source: tlstoc.s
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#as: -a64
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#ld:
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#objdump: -dr
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#target: powerpc64*-*-*
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.*
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Disassembly of section \.text:
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.* <\.__tls_get_addr>:
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.* (4e 80 00 20|20 00 80 4e) blr
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.* <\._start>:
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.* (60 00 00 00|00 00 00 60) nop
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.* (38 6d 90 40|40 90 6d 38) addi r3,r13,-28608
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.* (60 00 00 00|00 00 00 60) nop
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.* (60 00 00 00|00 00 00 60) nop
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.* (38 6d 10 00|00 10 6d 38) addi r3,r13,4096
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.* (60 00 00 00|00 00 00 60) nop
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.* (60 00 00 00|00 00 00 60) nop
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.* (38 6d 90 48|48 90 6d 38) addi r3,r13,-28600
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.* (60 00 00 00|00 00 00 60) nop
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.* (60 00 00 00|00 00 00 60) nop
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.* (38 6d 10 00|00 10 6d 38) addi r3,r13,4096
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.* (60 00 00 00|00 00 00 60) nop
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.* (39 23 80 50|50 80 23 39) addi r9,r3,-32688
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.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
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.* (81 49 80 58|58 80 49 81) lwz r10,-32680\(r9\)
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.* (e9 22 80 40|40 80 22 e9) ld r9,-32704\(r2\)
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.* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3
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.* (60 00 00 00|00 00 00 60) nop
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.* (a1 4d 90 68|68 90 4d a1) lhz r10,-28568\(r13\)
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.* (89 4d 90 70|70 90 4d 89) lbz r10,-28560\(r13\)
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.* (60 00 00 00|00 00 00 60) nop
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.* (99 4d 90 78|78 90 4d 99) stb r10,-28552\(r13\)
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