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binutils-gdb/gas/doc
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Alexander Fedotov 7408194835 [PowerPC VLE] Add SPE2 and EFS2 instructions support 
include/
	* opcode/ppc.h:
	(spe2_opcodes, spe2_num_opcodes): New.
	(PPC_OPCODE_SPE2): New define.
	(PPC_OPCODE_EFS2): Likewise.
	(SPE2_XOP): Likewise.
	(SPE2_XOP_TO_SEG): Likewise.
opcodes/
	* ppc-dis.c (ppc_mopt): Add PPC_OPCODE_SPE2 and
	PPC_OPCODE_EFS2 flag to "e200z4" entry.
	New entries efs2 and spe2.
	Add PPC_OPCODE_SPE2 and PPC_OPCODE_EFS2 flag to "vle" entry.
	(SPE2_OPCD_SEGS): New macro.
	(spe2_opcd_indices): New.
	(disassemble_init_powerpc): Handle SPE2 opcodes.
	(lookup_spe2): New function.
	(print_insn_powerpc): call lookup_spe2.
	* ppc-opc.c (insert_evuimm1_ex0): New function.
	(extract_evuimm1_ex0): Likewise.
	(insert_evuimm_lt8): Likewise.
	(extract_evuimm_lt8): Likewise.
	(insert_off_spe2): Likewise.
	(extract_off_spe2): Likewise.
	(insert_Ddd): Likewise.
	(extract_Ddd): Likewise.
	(DD): New operand.
	(EVUIMM_LT8): Likewise.
	(EVUIMM_LT16): Adjust.
	(MMMM): New operand.
	(EVUIMM_1): Likewise.
	(EVUIMM_1_EX0): Likewise.
	(EVUIMM_2): Adjust.
	(NNN): New operand.
	(VX_OFF_SPE2): Likewise.
	(BBB): Likewise.
	(DDD): Likewise.
	(VX_MASK_DDD): New mask.
	(HH): New operand.
	(VX_RA_CONST): New macro.
	(VX_RA_CONST_MASK): Likewise.
	(VX_RB_CONST): Likewise.
	(VX_RB_CONST_MASK): Likewise.
	(VX_OFF_SPE2_MASK): Likewise.
	(VX_SPE_CRFD): Likewise.
	(VX_SPE_CRFD_MASK VX): Likewise.
	(VX_SPE2_CLR): Likewise.
	(VX_SPE2_CLR_MASK): Likewise.
	(VX_SPE2_SPLATB): Likewise.
	(VX_SPE2_SPLATB_MASK): Likewise.
	(VX_SPE2_OCTET): Likewise.
	(VX_SPE2_OCTET_MASK): Likewise.
	(VX_SPE2_DDHH): Likewise.
	(VX_SPE2_DDHH_MASK): Likewise.
	(VX_SPE2_HH): Likewise.
	(VX_SPE2_HH_MASK): Likewise.
	(VX_SPE2_EVMAR): Likewise.
	(VX_SPE2_EVMAR_MASK): Likewise.
	(PPCSPE2): Likewise.
	(PPCEFS2): Likewise.
	(vle_opcodes): Add EFS2 and some missing SPE opcodes.
	(powerpc_macros): Map old SPE instructions have new names
	with the same opcodes. Add SPE2 instructions which just are
	mapped to SPE2.
	(spe2_opcodes): Add SPE2 opcodes.
gas/
	* config/tc-ppc.c:
	(md_parse_option): Add mspe2 switch.
	(md_show_usage): Document -mspe2.
	(ppc_setup_opcodes): Handle spe2_opcodes.
	* doc/as.texinfo: Document -mspe2.
	* doc/c-ppc.texi: Likewise.
	* testsuite/gas/ppc/efs.d: New file.
	* testsuite/gas/ppc/efs.s: Likewise.
	* testsuite/gas/ppc/efs2.d: Likewise.
	* testsuite/gas/ppc/efs2.s: Likewise.
	* testsuite/gas/ppc/ppc.exp: Run new tests.
	* testsuite/gas/ppc/spe.d: New file.
	* testsuite/gas/ppc/spe.s: Likewise.
	* testsuite/gas/ppc/spe2-checks.d: Likewise.
	* testsuite/gas/ppc/spe2-checks.l: Likewise.
	* testsuite/gas/ppc/spe2-checks.s: Likewise.
	* testsuite/gas/ppc/spe2.d: Likewise.
	* testsuite/gas/ppc/spe2.s: Likewise.
	* testsuite/gas/ppc/spe_ambiguous.d: Likewise.
	* testsuite/gas/ppc/spe_ambiguous.s: Likewise.
2017-08-24 17:30:31 +09:30
..
all.texi Add support for the WebAssembly file format and the wasm32 ELF conversion to gas and the binutils. 2017-03-30 10:57:21 +01:00
as.texinfo [PowerPC VLE] Add SPE2 and EFS2 instructions support 2017-08-24 17:30:31 +09:30
c-aarch64.texi [Patch AArch64] Turn lr, fp, ip0 and ip1 into proper aliases 2017-08-15 13:58:01 +01:00
c-alpha.texi
c-arc.texi [ARC] Object attributes. 2017-05-10 14:42:22 +02:00
c-arm.texi [ARM] Add support for Cortex-A55 and Cortex-A75. 2017-07-05 12:04:37 +01:00
c-avr.texi Update assembler documentation on some AVR cores. 2017-07-17 10:23:28 +01:00
c-bfin.texi
c-cr16.texi
c-cris.texi
c-d10v.texi
c-d30v.texi
c-epiphany.texi
c-h8300.texi
c-hppa.texi
c-i370.texi
c-i386.texi X86: Add pseudo prefixes to control encoding 2017-03-09 09:59:00 -08:00
c-i860.texi
c-i960.texi
c-ia64.texi
c-ip2k.texi
c-lm32.texi
c-m32c.texi
c-m32r.texi
c-m68hc11.texi
c-m68k.texi
c-metag.texi
c-microblaze.texi
c-mips.texi MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support 2017-06-28 02:07:36 +01:00
c-mmix.texi
c-msp430.texi
c-mt.texi
c-nds32.texi
c-nios2.texi
c-ns32k.texi
c-pdp11.texi
c-pj.texi
c-ppc.texi [PowerPC VLE] Add SPE2 and EFS2 instructions support 2017-08-24 17:30:31 +09:30
c-pru.texi
c-riscv.texi Sanitize RISC-V GAS help text, documentation 2017-03-22 15:46:52 -07:00
c-rl78.texi
c-rx.texi
c-s390.texi S/390: Support z14 as CPU name. 2017-07-21 10:54:06 +02:00
c-score.texi
c-sh64.texi
c-sh.texi
c-sparc.texi binutils: support for the SPARC M8 processor 2017-05-19 09:27:08 -07:00
c-tic6x.texi
c-tic54x.texi
c-tilegx.texi
c-tilepro.texi
c-v850.texi
c-vax.texi
c-visium.texi
c-wasm32.texi Add support for the WebAssembly file format and the wasm32 ELF conversion to gas and the binutils. 2017-03-30 10:57:21 +01:00
c-xc16x.texi
c-xgate.texi
c-xstormy16.texi
c-xtensa.texi
c-z8k.texi
c-z80.texi
fdl.texi
h8.texi
internals.texi
Makefile.am
Makefile.in