binutils-gdb/sim/example-synacor
Mike Frysinger 37e9f18266 sim: switch to AC_CHECK_FUNCS_ONCE & merge a little
This avoids duplicate tests for functions between common m4, arches,
and any other sources that would trigger func tests.

Also manually delete known duplicate function tests between the m4,
bfin, and v850 ports.
2021-04-18 21:55:17 -04:00
..
aclocal.m4
ChangeLog sim: switch to AC_CHECK_FUNCS_ONCE & merge a little 2021-04-18 21:55:17 -04:00
config.in
configure sim: switch to AC_CHECK_FUNCS_ONCE & merge a little 2021-04-18 21:55:17 -04:00
configure.ac
interp.c
Makefile.in
README
README.arch-spec
sim-main.c
sim-main.h

= OVERVIEW =

The Synacor Challenge is a fun programming exercise with a number of puzzles
built into it.  You can find more details about it here:
https://challenge.synacor.com/

The first puzzle is writing an interpreter for their custom ISA.  This is a
simulator for that custom CPU.  The CPU is quite basic: it's 16-bit with only
8 registers and a limited set of instructions.  This means the port will never
grow new features.  See README.arch-spec for more details.

Implementing it here ends up being quite useful: it acts as a simple constrained
"real world" example for people who want to implement a new simulator for their
own architecture.  We demonstrate all the basic fundamentals (registers, memory,
branches, and tracing) that all ports should have.