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35c081572f
BFD: * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32 files. * Makefile.in: Regenerate. * archures.c (bfd_nds32_arch): Add nds32 target. * bfd-in2.h: Regenerate. * config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec and bfd_elf32_nds32belin_vec. (nds32*be-*-linux*): Likewise. (nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec. (nds32*be-*-*): Likewise. * configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. * configure: Regenerate. * cpu-nds32.c: New file for nds32. * elf-bfd.h: Add NDS32_ELF_DATA. * elf32-nds32.c: New file for nds32. * elf32-nds32.h: New file for nds32. * libbfd.h: Regenerate. * reloc.c: Add relocations for nds32. * targets.c (bfd_elf32_nds32be_vec): New declaration for nds32. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. BINUTILS: * readelf.c: Include elf/nds32.h (guess_is_rela): Add case for EM_NDS32. (dump_relocations): Add case for EM_NDS32. (decode_NDS32_machine_flags): New. (get_machine_flags): Add case for EM_NDS32. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (process_nds32_specific): New. (process_arch_specific): Add case for EM_NDS32. * NEWS: Announce Andes nds32 support. * MAINTAINERS: Add nds32 maintainers. TESTSUITE: * binutils-all/objdump.exp: Add NDS32 cpu. * binutils-all/readelf.r: Skip extra reloc created by NDS32. GAS: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c. (TARGET_CPU_HFILES): Add config/tc-nds32.h. * Makefile.in: Regenerate. * configure.in (nds32): Add nds32 target extension config support. * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*. * configure: Regenerate. * config/tc-nds32.c: New file for nds32. * config/tc-nds32.h: New file for nds32. * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi. * doc/Makefile.in: Regenerate. * doc/as.texinfo: Add nds32 options. * doc/all.texi: Set NDS32. * doc/c-nds32.texi: New file dor nds32 document. * NEWS: Announce Andes nds32 support. TESTSUITE: * gas/all/gas.exp: Add expected failures for NDS32. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Use alternate test. * gas/macros/irp.d: Skip for NDS32. * gas/macros/macros.exp: Skip some tests for the NDS32. * gas/macros/rept.d: Skip for NDS32. * gas/macros/test3.d: Skip for NDS32. * gas/nds32: New directory. * gas/nds32/alu-1.s: New test. * gas/nds32/alu-1.d: Likewise. * gas/nds32/alu-2.s: Likewise. * gas/nds32/alu-2.d: Likewise. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-1.s: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/br-2.s: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/ji-jr.s: Likewise. * gas/nds32/ls.d: Likewise. * gas/nds32/ls.s: Likewise. * gas/nds32/lsi.d: Likewise. * gas/nds32/lsi.s: Likewise. * gas/nds32/to-16bit-v1.d: Likewise. * gas/nds32/to-16bit-v1.s: Likewise. * gas/nds32/to-16bit-v2.d: Likewise. * gas/nds32/to-16bit-v2.s: Likewise. * gas/nds32/to-16bit-v3.d: Likewise. * gas/nds32/to-16bit-v3.s: Likewise. * gas/nds32/nds32.exp: New test driver. LD: * Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target. * Makefile.in: Regenerate. * configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*, nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*. * emulparams/nds32belf.sh: New file for nds32. * emulparams/nds32belf_linux.sh: Likewise. * emulparams/nds32belf16m.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emultempl/nds32elf.em: Likewise. * scripttempl/nds32elf.sc}: Likewise. * gen-doc.texi: Set NDS32. * ld.texinfo: Set NDS32. * NEWS: Announce Andes nds32 support. TESTSUITE: * lib/ld-lib.exp: Add NDS32 to list of targets that do not support shared library generation. * ld-nds32: New directory. * ld-nds32/branch.d: New test. * ld-nds32/branch.ld: New test. * ld-nds32/branch.s: New test. * ld-nds32/diff.d: New test. * ld-nds32/diff.ld: New test. * ld-nds32/diff.s: New test. * ld-nds32/gp.d: New test. * ld-nds32/gp.ld: New test. * ld-nds32/gp.s: New test. * ld-nds32/imm.d: New test. * ld-nds32/imm.ld: New test. * ld-nds32/imm.s: New test. * ld-nds32/imm_symbol.s: New test. * ld-nds32/relax_jmp.d: New test. * ld-nds32/relax_jmp.ld: New test. * ld-nds32/relax_jmp.s: New test. * ld-nds32/relax_load_store.d: New test. * ld-nds32/relax_load_store.ld: New test. * ld-nds32/relax_load_store.s: New test. * ld-nds32/nds32.exp: New file. OPCODES: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c and nds32-dis.c. * Makefile.in: Regenerate. * configure.in: Add case for bfd_nds32_arch. * configure: Regenerate. * disassemble.c (ARCH_nds32): Define. * nds32-asm.c: New file for nds32. * nds32-asm.h: New file for nds32. * nds32-dis.c: New file for nds32. * nds32-opc.h: New file for nds32. INCLUDE: * dis-asm.h (print_insn_nds32): Add nds32 target. * elf/nds32.h: New file for nds32. * opcode/nds32.h: New file for nds32.
265 lines
9.2 KiB
C
265 lines
9.2 KiB
C
/* tc-nds32.h -- Header file for tc-nds32.c.
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Copyright (C) 2012-2013 Free Software Foundation, Inc.
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Contributed by Andes Technology Corporation.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#ifndef TC_NDS32
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#define TC_NDS32
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#include "bfd_stdint.h"
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#define LISTING_HEADER \
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(target_big_endian ? "NDS32 GAS" : "NDS32 GAS Little Endian")
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/* The target BFD architecture. */
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#define TARGET_ARCH bfd_arch_nds32
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/* mapping to mach_table[5] */
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#define ISA_V1 bfd_mach_n1h
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#define ISA_V2 bfd_mach_n1h_v2
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#define ISA_V3 bfd_mach_n1h_v3
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#define ISA_V3M bfd_mach_n1h_v3m
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/* Default to big endian. Please note that for Andes architecture,
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instructions are always in big-endian format. */
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#ifndef TARGET_BYTES_BIG_ENDIAN
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#define TARGET_BYTES_BIG_ENDIAN 1
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#endif
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/* This is used to construct expressions out of @GOTOFF, @PLT and @GOT
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symbols. The relocation type is stored in X_md. */
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#define O_PIC_reloc O_md1
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/* as.c. */
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/* Extend GAS command line option handling capability. */
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extern int nds32_parse_option (int, char *);
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extern void nds32_after_parse_args (void);
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/* The endianness of the target format may change based on command
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line arguments. */
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extern const char * nds32_target_format (void);
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#define md_parse_option(optc, optarg) nds32_parse_option (optc, optarg)
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#define md_after_parse_args() nds32_after_parse_args ()
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#define TARGET_FORMAT nds32_target_format()
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/* expr.c */
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extern int nds32_parse_name (char const *, expressionS *, enum expr_mode, char *);
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extern bfd_boolean nds32_allow_local_subtract (expressionS *, expressionS *, segT);
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#define md_parse_name(name, exprP, mode, nextcharP) \
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nds32_parse_name (name, exprP, mode, nextcharP)
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#define md_allow_local_subtract(lhs,rhs,sect) nds32_allow_local_subtract (lhs, rhs, sect)
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/* dwarf2dbg.c. */
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#define DWARF2_USE_FIXED_ADVANCE_PC 1
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/* write.c. */
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extern long nds32_pcrel_from_section (struct fix *, segT);
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extern bfd_boolean nds32_fix_adjustable (struct fix *);
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extern void nds32_frob_file (void);
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extern void nds32_post_relax_hook (void);
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extern void nds32_frob_file_before_fix (void);
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extern void elf_nds32_final_processing (void);
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extern int nds32_validate_fix_sub (struct fix *, segT);
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extern int nds32_force_relocation (struct fix *);
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extern void nds32_set_section_relocs (asection *, arelent ** , unsigned int);
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/* Fill in rs_align_code fragments. TODO: Review this. */
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extern void nds32_handle_align (fragS *);
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extern int nds32_relax_frag (segT, fragS *, long);
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extern int tc_nds32_regname_to_dw2regnum (char *);
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extern void tc_nds32_frame_initial_instructions (void);
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#define MD_PCREL_FROM_SECTION(fix, sect) nds32_pcrel_from_section (fix, sect)
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#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
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#define tc_fix_adjustable(FIX) nds32_fix_adjustable (FIX)
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#define md_apply_fix(fixP, addn, seg) nds32_apply_fix (fixP, addn, seg)
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#define md_post_relax_hook nds32_post_relax_hook ()
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#define tc_frob_file_before_fix() nds32_frob_file_before_fix ()
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#define elf_tc_final_processing() elf_nds32_final_processing ()
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/* For DIFF relocations. The default behavior is inconsistent with the
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asm internal document. */
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEC) \
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(! SEG_NORMAL (SEC) || TC_FORCE_RELOCATION (FIX))
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#define TC_FORCE_RELOCATION(fix) nds32_force_relocation (fix)
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#define TC_VALIDATE_FIX_SUB(FIX,SEG) nds32_validate_fix_sub (FIX,SEG)
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#define SET_SECTION_RELOCS(sec, relocs, n) nds32_set_section_relocs (sec, relocs, n)
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/* Values passed to md_apply_fix don't include the symbol value. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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#define HANDLE_ALIGN(f) nds32_handle_align (f)
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#undef DIFF_EXPR_OK /* They should be fixed in linker. */
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#define md_relax_frag(segment, fragP, stretch) nds32_relax_frag (segment, fragP, stretch)
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#define WORKING_DOT_WORD /* We don't need to handle .word strangely. */
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/* Using to chain fixup with previous fixup. */
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#define TC_FIX_TYPE struct fix *
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#define TC_INIT_FIX_DATA(fixP) \
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do \
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{ \
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fixP->tc_fix_data = NULL; \
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} \
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while (0)
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/* read.c. */
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/* Extend GAS macro handling capability. */
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extern void nds32_macro_start (void);
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extern void nds32_macro_end (void);
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extern void nds32_macro_info (void *);
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extern void nds32_start_line_hook (void);
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extern void nds32_elf_section_change_hook (void);
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extern void md_begin (void);
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extern void md_end (void);
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extern int nds32_start_label (int, int);
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extern void nds32_cleanup (void);
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extern void nds32_flush_pending_output (void);
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extern void nds32_cons_align (int);
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extern void nds32_check_label (symbolS *);
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extern void nds32_frob_label (symbolS *);
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extern void nds32_pre_do_align (int, char *, int, int);
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extern void nds32_do_align (int);
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#define md_macro_start() nds32_macro_start ()
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#define md_macro_end() nds32_macro_end ()
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#define md_macro_info(args) nds32_macro_info (args)
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#define TC_START_LABEL(C, S, STR) (C == ':' && nds32_start_label (0, 0))
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#define tc_check_label(label) nds32_check_label (label)
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#define tc_frob_label(label) nds32_frob_label (label)
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#define md_end md_end
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#define md_start_line_hook() nds32_start_line_hook ()
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#define md_cons_align(n) nds32_cons_align (n)
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/* COLE: TODO: Review md_do_align. */
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#define md_do_align(N, FILL, LEN, MAX, LABEL) \
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nds32_pre_do_align (N, FILL, LEN, MAX); \
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if ((N) > 1 && (subseg_text_p (now_seg) \
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|| strncmp (now_seg->name, ".gcc_except_table", sizeof(".gcc_except_table") - 1) == 0)) \
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nds32_do_align (N); \
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goto LABEL;
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#define md_elf_section_change_hook() nds32_elf_section_change_hook ()
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#define md_flush_pending_output() nds32_flush_pending_output ()
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#define md_cleanup() nds32_cleanup ()
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#define LOCAL_LABELS_FB 1 /* Permit temporary numeric labels. */
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/* frags.c. */
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struct nds32_frag_type
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{
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relax_substateT flag;
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struct nds32_opcode *opcode;
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uint32_t insn;
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/* To Save previos label fixup if existence. */
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struct fix *fixup;
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};
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extern void nds32_frag_init (fragS *);
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#define TC_FRAG_TYPE struct nds32_frag_type
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#define TC_FRAG_INIT(fragP) nds32_frag_init (fragP)
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/* CFI directive. */
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extern void nds32_elf_frame_initial_instructions (void);
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extern int tc_nds32_regname_to_dw2regnum (char *);
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#define TARGET_USE_CFIPOP 1
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#define DWARF2_DEFAULT_RETURN_COLUMN 30
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#define DWARF2_CIE_DATA_ALIGNMENT -4
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#define DWARF2_LINE_MIN_INSN_LENGTH 2
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#define tc_regname_to_dw2regnum tc_nds32_regname_to_dw2regnum
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#define tc_cfi_frame_initial_instructions tc_nds32_frame_initial_instructions
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/* COLE: TODO: Review These. They seem to be obsoleted. */
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#if 1
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#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
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((FIX)->fx_addsy == NULL \
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|| (! S_IS_EXTERNAL ((FIX)->fx_addsy) \
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&& ! S_IS_WEAK ((FIX)->fx_addsy) \
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&& S_IS_DEFINED ((FIX)->fx_addsy) \
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&& ! S_IS_COMMON ((FIX)->fx_addsy)))
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#define TC_HANDLES_FX_DONE
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/* This arranges for gas/write.c to not apply a relocation if
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obj_fix_adjustable() says it is not adjustable. */
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#define TC_FIX_ADJUSTABLE(fixP) obj_fix_adjustable (fixP)
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#endif
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/* Because linker may relax the code, assemble-time expression
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optimization is not allowed. */
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#define md_allow_eh_opt 0
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/* For nds32 relax. */
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enum nds32_br_range
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{
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BR_RANGE_S256 = 0,
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BR_RANGE_S16K,
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BR_RANGE_S64K,
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BR_RANGE_S16M,
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BR_RANGE_U4G,
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BR_RANGE_NUM
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};
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enum nds32_ramp
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{
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NDS32_CREATE_LABLE = 1,
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NDS32_RELAX = 2,
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NDS32_ORIGIN = 4,
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NDS32_CONVERT = 8
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};
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typedef struct nds32_relax_fixup_info
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{
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int offset;
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int size;
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/* Reverse branch has to jump to the end of instruction pattern. */
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int ramp;
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enum bfd_reloc_code_real r_type;
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} nds32_relax_fixup_info_t;
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typedef struct nds32_cond_field
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{
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int offset;
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int bitpos; /* Register position. */
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int bitmask; /* Number of register bits. */
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} nds32_cond_field_t;
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/* The max relaxation pattern is 20-bytes including the nop. */
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#define NDS32_MAXCHAR 20
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/* In current, the max entend number of instruction for one pseudo instruction
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is 4, but its number of relocation may be 5. */
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#define MAX_RELAX_NUM 8
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typedef struct nds32_relax_info
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{
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/* Opcode for the instruction. */
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const char *opcode;
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enum nds32_br_range br_range;
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nds32_cond_field_t cond_field[MAX_RELAX_NUM]; /* TODO: Reuse nds32_field? */
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/* Code sequences for different branch range. */
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uint32_t relax_code_seq[BR_RANGE_NUM][MAX_RELAX_NUM];
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nds32_cond_field_t relax_code_condition[BR_RANGE_NUM][MAX_RELAX_NUM];
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int relax_code_size[BR_RANGE_NUM];
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int relax_branch_isize[BR_RANGE_NUM];
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nds32_relax_fixup_info_t relax_fixup[BR_RANGE_NUM][MAX_RELAX_NUM];
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} relax_info_t;
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/* Relocation table. */
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struct nds32_relocation_map
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{
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unsigned int main_type;
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/* Number of instructions, {relocations type, instruction type}. */
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unsigned int reloc_insn[6][6][3];
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};
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#endif /* TC_NDS32 */
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