Jeff Law b3fa92f12a Yet another fix for mcore-sim (rotli) ... This came up testing the CRC optimization work from Mariam@RAU. Basically to optimize some CRC loops into table lookups or carryless multiplies, we may need to do a bit reflection, which on the mcore processor is done using a rotate instruction. Unfortunately the simulator implementation of rotates has the exact same problem as we saw with right shifts. The input value may have been sign extended from 32 to 64 bits. When we rotate the extended value, we get those sign extension bits and thus the wrong result. The fix is the same. Rather than using a "long", use a uint32_t for the type of the temporary. This fixes a handful of tests in the GCC testsuite:		2023-12-18 22:04:25 -07:00
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allinsn.exp
ChangeLog-2021
fail.s
lsr.s
lsri.s
pass.s
rotli.s	Yet another fix for mcore-sim (rotli)	2023-12-18 22:04:25 -07:00
sextb.s
sexth.s
testutils.inc