mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-03 04:12:10 +08:00
177321bd85
(arm_linux_thumb2_le_breakpoint): New constants. (arm_linux_init_abi): Set thumb2_breakpoint and thumb2_breakpoint_size. * arm-tdep.c (thumb_insn_size, thumb_advance_itstate): New functions. (thumb_get_next_pc): Add a comment. Rename IT to ITSTATE. Implement support for single stepping through IT blocks if a 32-bit Thumb breakpoint instruction is available. (arm_breakpoint_from_pc): If a 32-bit Thumb breakpoint instruction is available, use it when needed. (arm_remote_breakpoint_from_pc): New function. (arm_gdbarch_init): Register arm_remote_breakpoint_from_pc. * arm-tdep.h (struct gdbarch_tdep): Correct thumb_breakpoint comment. Add thumb2_breakpoint and thumb2_breakpoint_size. gdbserver/ * linux-arm-low.c (thumb_breakpoint_len): Delete. (thumb2_breakpoint): New. (arm_breakpoint_at): Check for Thumb-2 breakpoints. testsuite/ * gdb.arch/thumb2-it.S, gdb.arch/thumb2-it.exp: New files.
393 lines
9.5 KiB
C
393 lines
9.5 KiB
C
/* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
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Copyright (C) 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
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2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "linux-low.h"
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/* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
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On Bionic elf.h and linux/elf.h have conflicting definitions. */
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#ifndef ELFMAG0
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#include <elf.h>
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#endif
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#include <sys/ptrace.h>
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/* Defined in auto-generated files. */
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void init_registers_arm (void);
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void init_registers_arm_with_iwmmxt (void);
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void init_registers_arm_with_vfpv2 (void);
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void init_registers_arm_with_vfpv3 (void);
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void init_registers_arm_with_neon (void);
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#ifndef PTRACE_GET_THREAD_AREA
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#define PTRACE_GET_THREAD_AREA 22
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#endif
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#ifndef PTRACE_GETWMMXREGS
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# define PTRACE_GETWMMXREGS 18
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# define PTRACE_SETWMMXREGS 19
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#endif
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#ifndef PTRACE_GETVFPREGS
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# define PTRACE_GETVFPREGS 27
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# define PTRACE_SETVFPREGS 28
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#endif
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static unsigned long arm_hwcap;
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/* These are in <asm/elf.h> in current kernels. */
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#define HWCAP_VFP 64
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#define HWCAP_IWMMXT 512
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#define HWCAP_NEON 4096
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#define HWCAP_VFPv3 8192
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#define HWCAP_VFPv3D16 16384
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#ifdef HAVE_SYS_REG_H
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#include <sys/reg.h>
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#endif
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#define arm_num_regs 26
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static int arm_regmap[] = {
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0, 4, 8, 12, 16, 20, 24, 28,
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32, 36, 40, 44, 48, 52, 56, 60,
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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64
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};
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static int
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arm_cannot_store_register (int regno)
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{
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return (regno >= arm_num_regs);
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}
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static int
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arm_cannot_fetch_register (int regno)
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{
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return (regno >= arm_num_regs);
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}
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static void
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arm_fill_gregset (struct regcache *regcache, void *buf)
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{
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int i;
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for (i = 0; i < arm_num_regs; i++)
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if (arm_regmap[i] != -1)
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collect_register (regcache, i, ((char *) buf) + arm_regmap[i]);
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}
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static void
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arm_store_gregset (struct regcache *regcache, const void *buf)
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{
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int i;
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char zerobuf[8];
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memset (zerobuf, 0, 8);
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for (i = 0; i < arm_num_regs; i++)
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if (arm_regmap[i] != -1)
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supply_register (regcache, i, ((char *) buf) + arm_regmap[i]);
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else
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supply_register (regcache, i, zerobuf);
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}
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static void
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arm_fill_wmmxregset (struct regcache *regcache, void *buf)
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{
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int i;
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if (!(arm_hwcap & HWCAP_IWMMXT))
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return;
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for (i = 0; i < 16; i++)
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collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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/* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
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for (i = 0; i < 6; i++)
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collect_register (regcache, arm_num_regs + i + 16,
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(char *) buf + 16 * 8 + i * 4);
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}
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static void
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arm_store_wmmxregset (struct regcache *regcache, const void *buf)
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{
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int i;
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if (!(arm_hwcap & HWCAP_IWMMXT))
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return;
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for (i = 0; i < 16; i++)
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supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
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/* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
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for (i = 0; i < 6; i++)
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supply_register (regcache, arm_num_regs + i + 16,
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(char *) buf + 16 * 8 + i * 4);
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}
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static void
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arm_fill_vfpregset (struct regcache *regcache, void *buf)
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{
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int i, num, base;
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if (!(arm_hwcap & HWCAP_VFP))
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return;
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if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
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num = 32;
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else
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num = 16;
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base = find_regno ("d0");
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for (i = 0; i < num; i++)
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collect_register (regcache, base + i, (char *) buf + i * 8);
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collect_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
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}
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static void
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arm_store_vfpregset (struct regcache *regcache, const void *buf)
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{
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int i, num, base;
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if (!(arm_hwcap & HWCAP_VFP))
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return;
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if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
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num = 32;
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else
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num = 16;
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base = find_regno ("d0");
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for (i = 0; i < num; i++)
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supply_register (regcache, base + i, (char *) buf + i * 8);
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supply_register_by_name (regcache, "fpscr", (char *) buf + 32 * 8);
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}
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extern int debug_threads;
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static CORE_ADDR
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arm_get_pc (struct regcache *regcache)
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{
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unsigned long pc;
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collect_register_by_name (regcache, "pc", &pc);
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if (debug_threads)
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fprintf (stderr, "stop pc is %08lx\n", pc);
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return pc;
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}
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static void
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arm_set_pc (struct regcache *regcache, CORE_ADDR pc)
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{
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unsigned long newpc = pc;
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supply_register_by_name (regcache, "pc", &newpc);
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}
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/* Correct in either endianness. */
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static const unsigned long arm_breakpoint = 0xef9f0001;
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#define arm_breakpoint_len 4
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static const unsigned short thumb_breakpoint = 0xde01;
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static const unsigned short thumb2_breakpoint[] = { 0xf7f0, 0xa000 };
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/* For new EABI binaries. We recognize it regardless of which ABI
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is used for gdbserver, so single threaded debugging should work
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OK, but for multi-threaded debugging we only insert the current
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ABI's breakpoint instruction. For now at least. */
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static const unsigned long arm_eabi_breakpoint = 0xe7f001f0;
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static int
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arm_breakpoint_at (CORE_ADDR where)
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{
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struct regcache *regcache = get_thread_regcache (current_inferior, 1);
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unsigned long cpsr;
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collect_register_by_name (regcache, "cpsr", &cpsr);
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if (cpsr & 0x20)
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{
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/* Thumb mode. */
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unsigned short insn;
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(*the_target->read_memory) (where, (unsigned char *) &insn, 2);
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if (insn == thumb_breakpoint)
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return 1;
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if (insn == thumb2_breakpoint[0])
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{
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(*the_target->read_memory) (where + 2, (unsigned char *) &insn, 2);
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if (insn == thumb2_breakpoint[1])
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return 1;
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}
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}
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else
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{
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/* ARM mode. */
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unsigned long insn;
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(*the_target->read_memory) (where, (unsigned char *) &insn, 4);
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if (insn == arm_breakpoint)
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return 1;
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if (insn == arm_eabi_breakpoint)
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return 1;
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}
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return 0;
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}
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/* We only place breakpoints in empty marker functions, and thread locking
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is outside of the function. So rather than importing software single-step,
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we can just run until exit. */
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static CORE_ADDR
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arm_reinsert_addr (void)
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{
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struct regcache *regcache = get_thread_regcache (current_inferior, 1);
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unsigned long pc;
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collect_register_by_name (regcache, "lr", &pc);
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return pc;
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}
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/* Fetch the thread-local storage pointer for libthread_db. */
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ps_err_e
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ps_get_thread_area (const struct ps_prochandle *ph,
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lwpid_t lwpid, int idx, void **base)
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{
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if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
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return PS_ERR;
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/* IDX is the bias from the thread pointer to the beginning of the
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thread descriptor. It has to be subtracted due to implementation
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quirks in libthread_db. */
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*base = (void *) ((char *)*base - idx);
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return PS_OK;
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}
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static int
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arm_get_hwcap (unsigned long *valp)
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{
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unsigned char *data = alloca (8);
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int offset = 0;
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while ((*the_target->read_auxv) (offset, data, 8) == 8)
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{
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unsigned int *data_p = (unsigned int *)data;
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if (data_p[0] == AT_HWCAP)
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{
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*valp = data_p[1];
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return 1;
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}
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offset += 8;
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}
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*valp = 0;
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return 0;
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}
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static void
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arm_arch_setup (void)
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{
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arm_hwcap = 0;
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if (arm_get_hwcap (&arm_hwcap) == 0)
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{
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init_registers_arm ();
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return;
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}
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if (arm_hwcap & HWCAP_IWMMXT)
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{
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init_registers_arm_with_iwmmxt ();
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return;
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}
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if (arm_hwcap & HWCAP_VFP)
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{
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int pid;
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char *buf;
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/* NEON implies either no VFP, or VFPv3-D32. We only support
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it with VFP. */
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if (arm_hwcap & HWCAP_NEON)
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init_registers_arm_with_neon ();
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else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
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init_registers_arm_with_vfpv3 ();
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else
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init_registers_arm_with_vfpv2 ();
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/* Now make sure that the kernel supports reading these
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registers. Support was added in 2.6.30. */
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pid = lwpid_of (get_thread_lwp (current_inferior));
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errno = 0;
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buf = malloc (32 * 8 + 4);
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if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
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&& errno == EIO)
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{
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arm_hwcap = 0;
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init_registers_arm ();
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}
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free (buf);
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return;
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}
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/* The default configuration uses legacy FPA registers, probably
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simulated. */
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init_registers_arm ();
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}
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struct regset_info target_regsets[] = {
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{ PTRACE_GETREGS, PTRACE_SETREGS, 18 * 4,
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GENERAL_REGS,
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arm_fill_gregset, arm_store_gregset },
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{ PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 16 * 8 + 6 * 4,
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EXTENDED_REGS,
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arm_fill_wmmxregset, arm_store_wmmxregset },
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{ PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 32 * 8 + 4,
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EXTENDED_REGS,
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arm_fill_vfpregset, arm_store_vfpregset },
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{ 0, 0, -1, -1, NULL, NULL }
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};
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struct linux_target_ops the_low_target = {
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arm_arch_setup,
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arm_num_regs,
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arm_regmap,
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arm_cannot_fetch_register,
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arm_cannot_store_register,
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arm_get_pc,
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arm_set_pc,
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/* Define an ARM-mode breakpoint; we only set breakpoints in the C
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library, which is most likely to be ARM. If the kernel supports
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clone events, we will never insert a breakpoint, so even a Thumb
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C library will work; so will mixing EABI/non-EABI gdbserver and
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application. */
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#ifndef __ARM_EABI__
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(const unsigned char *) &arm_breakpoint,
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#else
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(const unsigned char *) &arm_eabi_breakpoint,
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#endif
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arm_breakpoint_len,
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arm_reinsert_addr,
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0,
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arm_breakpoint_at,
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};
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