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d2d240ff89
Run gdb/contrib/spellcheck.sh on directory sim. Fix auto-corrected typos: ... accessable -> accessible accidently -> accidentally accomodate -> accommodate adress -> address afair -> affair agains -> against agressively -> aggressively annuled -> annulled arbitary -> arbitrary arround -> around auxillary -> auxiliary availablity -> availability clasic -> classic comming -> coming controled -> controlled controling -> controlling destory -> destroy existance -> existence explictly -> explicitly faciliate -> facilitate fouth -> fourth fullfilled -> fulfilled guarentee -> guarantee hinderance -> hindrance independant -> independent inital -> initial loosing -> losing occurance -> occurrence occured -> occurred occuring -> occurring omited -> omitted oportunity -> opportunity parallely -> parallelly permissable -> permissible postive -> positive powerfull -> powerful preceed -> precede preceeding -> preceding preceeds -> precedes primative -> primitive probaly -> probably programable -> programmable propogate -> propagate propper -> proper recieve -> receive reconized -> recognized refered -> referred refering -> referring relevent -> relevant responisble -> responsible retreive -> retrieve safty -> safety specifiying -> specifying spontanous -> spontaneous sqaure -> square successfull -> successful supress -> suppress sytem -> system thru -> through transfered -> transferred trigered -> triggered unfortunatly -> unfortunately upto -> up to usefull -> useful wierd -> weird writen -> written doesnt -> doesn't isnt -> isn't ... Manually undid the "andd -> and" transformation in sim/testsuite/cr16/andd.cgs and sim/cr16/simops.c. Tested by rebuilding on x86_64-linux. Approved-By: Tom Tromey <tom@tromey.com>
99 lines
2.8 KiB
C
99 lines
2.8 KiB
C
/* Generic simulator resume.
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Copyright (C) 1997-2024 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This must come before any other includes. */
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#include "defs.h"
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#include "sim-main.h"
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#include "sim-assert.h"
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#include "sim-signal.h"
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/* Halt the simulator after just one instruction */
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static void
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has_stepped (SIM_DESC sd,
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void *data)
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{
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ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP);
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}
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/* Generic resume - assumes the existence of sim_engine_run */
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void
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sim_resume (SIM_DESC sd,
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int step,
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int siggnal)
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{
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sim_engine *engine = STATE_ENGINE (sd);
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jmp_buf buf;
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int jmpval;
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ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
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/* we only want to be single stepping the simulator once */
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if (engine->stepper != NULL)
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{
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sim_events_deschedule (sd, engine->stepper);
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engine->stepper = NULL;
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}
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if (step)
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engine->stepper = sim_events_schedule (sd, 1, has_stepped, sd);
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sim_module_resume (sd);
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/* run/resume the simulator */
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engine->jmpbuf = &buf;
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jmpval = setjmp (buf);
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if (jmpval == sim_engine_start_jmpval
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|| jmpval == sim_engine_restart_jmpval)
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{
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int last_cpu_nr = sim_engine_last_cpu_nr (sd);
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int next_cpu_nr = sim_engine_next_cpu_nr (sd);
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int nr_cpus = sim_engine_nr_cpus (sd);
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int sig_to_deliver;
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sim_events_preprocess (sd, last_cpu_nr >= nr_cpus, next_cpu_nr >= nr_cpus);
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if (next_cpu_nr >= nr_cpus)
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next_cpu_nr = 0;
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/* Only deliver the SIGGNAL [sic] the first time through - don't
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re-deliver any SIGGNAL during a restart. NOTE: A new local
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variable is used to avoid problems with the automatic
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variable ``siggnal'' being trashed by a long jump. */
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if (jmpval == sim_engine_start_jmpval)
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sig_to_deliver = siggnal;
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else
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sig_to_deliver = 0;
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#ifdef SIM_CPU_EXCEPTION_RESUME
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{
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sim_cpu* cpu = STATE_CPU (sd, next_cpu_nr);
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SIM_CPU_EXCEPTION_RESUME (sd, cpu, sig_to_deliver);
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}
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#endif
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sim_engine_run (sd, next_cpu_nr, nr_cpus, sig_to_deliver);
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}
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engine->jmpbuf = NULL;
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sim_module_suspend (sd);
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}
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