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a27e685fa0
This change, with prerequisite 0e5fabeb, provides a toc base aligned
to 256 bytes rather than 8 bytes. This is necessary for a minor gcc
optimisation, allowing use of d-form instructions to correctly access
toc-relative items larger than 8 bytes.
bfd/
* elf64-ppc.c (TOC_BASE_ALIGN): Define.
(ppc64_elf_next_toc_section): Align multi-got toc base.
(ppc64_elf_set_toc): Likewise initial toc base and .TOC. symbol.
ld/
* emulparams/elf64ppc.sh (GOT): Align.
ld/testsuite/
* ld-powerpc/ambiguousv1b.d: Update for aligned .got.
* ld-powerpc/defsym.d: Likewise.
* ld-powerpc/elfv2-2exe.d: Likewise.
* ld-powerpc/elfv2exe.d: Likewise.
* ld-powerpc/elfv2so.d: Likewise.
* ld-powerpc/relbrlt.d: Likewise.
* ld-powerpc/tls.g: Likewise.
* ld-powerpc/tlsexe.d: Likewise.
* ld-powerpc/tlsexe.g: Likewise.
* ld-powerpc/tlsexe.r: Likewise.
* ld-powerpc/tlsexetoc.d: Likewise.
* ld-powerpc/tlsexetoc.g: Likewise.
* ld-powerpc/tlsexetoc.r: Likewise.
* ld-powerpc/tlsso.d: Likewise.
* ld-powerpc/tlsso.g: Likewise.
* ld-powerpc/tlsso.r: Likewise.
* ld-powerpc/tlstoc.g: Likewise.
* ld-powerpc/tlstocso.d: Likewise.
* ld-powerpc/tlstocso.g: Likewise.
* ld-powerpc/tlstocso.r: Likewise.
* ld-powerpc/tocopt.d: Likewise.
* ld-powerpc/tocopt2.d: Likewise.
* ld-powerpc/tocopt3.d: Likewise.
* ld-powerpc/tocopt4.d: Likewise.
* ld-powerpc/tocopt5.d: Likewise.
42 lines
1.1 KiB
Makefile
42 lines
1.1 KiB
Makefile
#source: elfv2-2a.s
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#source: elfv2-2b.s
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#as: -a64
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#ld: -melf64ppc -e f1
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#objdump: -dr
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.*
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Disassembly of section \.text:
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0+10000078 <f1>:
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.*: (3c 40 10 01|01 10 40 3c) lis r2,4097
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.*: (38 42 80 00|00 80 42 38) addi r2,r2,-32768
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.*: (4e 80 00 20|20 00 80 4e) blr
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0+10000084 <f2>:
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.*: (38 4c 7f 7c|7c 7f 4c 38) addi r2,r12,32636
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.*: (4e 80 00 20|20 00 80 4e) blr
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.*: (00 00 00 00|78 00 00 10) .*
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.*: (10 00 00 78|00 00 00 00) .*
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.*: (00 00 00 00|80 00 00 10) .*
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.*: (10 00 00 80|00 00 00 00) .*
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.*: (00 00 00 00|84 00 00 10) .*
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.*: (10 00 00 84|00 00 00 00) .*
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.*: (00 00 00 00|88 00 00 10) .*
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.*: (10 00 00 88|00 00 00 00) .*
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.*: (00 00 00 00|cc 00 00 10) .*
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.*: (10 00 00 cc|00 00 00 00) .*
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.*: (00 00 00 00|d4 00 00 10) .*
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.*: (10 00 00 d4|00 00 00 00) .*
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.*: (00 00 00 00|d8 00 00 10) .*
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.*: (10 00 00 d8|00 00 00 00) .*
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.*: (00 00 00 00|d8 00 00 10) .*
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.*: (10 00 00 d8|00 00 00 00) .*
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0+100000cc <f3>:
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.*: (3c 40 10 01|01 10 40 3c) lis r2,4097
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.*: (38 42 80 00|00 80 42 38) addi r2,r2,-32768
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.*: (4e 80 00 20|20 00 80 4e) blr
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0+100000d8 <f4>:
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.*: (4e 80 00 20|20 00 80 4e) blr
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