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335 lines
8.4 KiB
C++
335 lines
8.4 KiB
C++
/* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
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Copyright (C) 2007-2021 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "linux-low.h"
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/* Linux target op definitions for the Xtensa architecture. */
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class xtensa_target : public linux_process_target
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{
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public:
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const regs_info *get_regs_info () override;
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const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
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protected:
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void low_arch_setup () override;
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bool low_cannot_fetch_register (int regno) override;
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bool low_cannot_store_register (int regno) override;
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bool low_supports_breakpoints () override;
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CORE_ADDR low_get_pc (regcache *regcache) override;
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void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
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bool low_breakpoint_at (CORE_ADDR pc) override;
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};
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/* The singleton target ops object. */
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static xtensa_target the_xtensa_target;
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bool
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xtensa_target::low_cannot_fetch_register (int regno)
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{
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gdb_assert_not_reached ("linux target op low_cannot_fetch_register "
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"is not implemented by the target");
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}
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bool
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xtensa_target::low_cannot_store_register (int regno)
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{
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gdb_assert_not_reached ("linux target op low_cannot_store_register "
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"is not implemented by the target");
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}
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bool
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xtensa_target::low_supports_breakpoints ()
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{
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return true;
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}
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CORE_ADDR
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xtensa_target::low_get_pc (regcache *regcache)
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{
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return linux_get_pc_32bit (regcache);
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}
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void
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xtensa_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
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{
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linux_set_pc_32bit (regcache, pc);
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}
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/* Defined in auto-generated file reg-xtensa.c. */
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void init_registers_xtensa (void);
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extern const struct target_desc *tdesc_xtensa;
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#include <asm/ptrace.h>
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#include <xtensa-config.h>
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#include "arch/xtensa.h"
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#include "gdb_proc_service.h"
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#include "xtensa-xtregs.c"
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enum regnum {
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R_PC=0, R_PS,
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R_LBEG, R_LEND, R_LCOUNT,
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R_SAR,
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R_WS, R_WB,
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R_THREADPTR,
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R_A0 = 64
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};
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static void
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xtensa_fill_gregset (struct regcache *regcache, void *buf)
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{
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elf_greg_t* rset = (elf_greg_t*)buf;
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const struct target_desc *tdesc = regcache->tdesc;
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int ar0_regnum;
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char *ptr;
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int i;
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/* Take care of AR registers. */
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ar0_regnum = find_regno (tdesc, "ar0");
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ptr = (char*)&rset[R_A0];
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for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
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{
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collect_register (regcache, i, ptr);
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ptr += register_size (tdesc, i);
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}
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if (XSHAL_ABI == XTHAL_ABI_CALL0)
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{
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int a0_regnum = find_regno (tdesc, "a0");
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ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]];
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for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
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{
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if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
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ptr = (char *) &rset[R_A0];
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collect_register (regcache, i, ptr);
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ptr += register_size (tdesc, i);
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}
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}
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/* Loop registers, if hardware has it. */
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#if XCHAL_HAVE_LOOPS
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collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
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collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
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collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
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#endif
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collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
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collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
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collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
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collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
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collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
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#if XCHAL_HAVE_THREADPTR
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collect_register_by_name (regcache, "threadptr",
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(char *) &rset[R_THREADPTR]);
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#endif
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}
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static void
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xtensa_store_gregset (struct regcache *regcache, const void *buf)
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{
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const elf_greg_t* rset = (const elf_greg_t*)buf;
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const struct target_desc *tdesc = regcache->tdesc;
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int ar0_regnum;
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char *ptr;
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int i;
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/* Take care of AR registers. */
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ar0_regnum = find_regno (tdesc, "ar0");
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ptr = (char *)&rset[R_A0];
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for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
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{
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supply_register (regcache, i, ptr);
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ptr += register_size (tdesc, i);
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}
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if (XSHAL_ABI == XTHAL_ABI_CALL0)
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{
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int a0_regnum = find_regno (tdesc, "a0");
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ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS];
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for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
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{
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if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
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ptr = (char *) &rset[R_A0];
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supply_register (regcache, i, ptr);
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ptr += register_size (tdesc, i);
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}
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}
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/* Loop registers, if hardware has it. */
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#if XCHAL_HAVE_LOOPS
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supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
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supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
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supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
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#endif
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supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
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supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
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supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
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supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
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supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
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#if XCHAL_HAVE_THREADPTR
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supply_register_by_name (regcache, "threadptr",
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(char *) &rset[R_THREADPTR]);
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#endif
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}
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/* Xtensa GNU/Linux PTRACE interface includes extended register set. */
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static void
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xtensa_fill_xtregset (struct regcache *regcache, void *buf)
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{
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const xtensa_regtable_t *ptr;
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for (ptr = xtensa_regmap_table; ptr->name; ptr++)
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{
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collect_register_by_name (regcache, ptr->name,
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(char*)buf + ptr->ptrace_offset);
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}
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}
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static void
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xtensa_store_xtregset (struct regcache *regcache, const void *buf)
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{
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const xtensa_regtable_t *ptr;
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for (ptr = xtensa_regmap_table; ptr->name; ptr++)
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{
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supply_register_by_name (regcache, ptr->name,
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(char*)buf + ptr->ptrace_offset);
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}
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}
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static struct regset_info xtensa_regsets[] = {
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{ PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
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GENERAL_REGS,
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xtensa_fill_gregset, xtensa_store_gregset },
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{ PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
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EXTENDED_REGS,
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xtensa_fill_xtregset, xtensa_store_xtregset },
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NULL_REGSET
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};
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#if XCHAL_HAVE_BE
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#define XTENSA_BREAKPOINT {0xd2,0x0f}
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#else
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#define XTENSA_BREAKPOINT {0x2d,0xf0}
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#endif
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static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
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#define xtensa_breakpoint_len 2
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/* Implementation of target ops method "sw_breakpoint_from_kind". */
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const gdb_byte *
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xtensa_target::sw_breakpoint_from_kind (int kind, int *size)
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{
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*size = xtensa_breakpoint_len;
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return xtensa_breakpoint;
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}
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bool
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xtensa_target::low_breakpoint_at (CORE_ADDR where)
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{
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unsigned long insn;
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read_memory (where, (unsigned char *) &insn, xtensa_breakpoint_len);
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return memcmp((char *) &insn,
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xtensa_breakpoint, xtensa_breakpoint_len) == 0;
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}
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/* Called by libthread_db. */
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ps_err_e
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ps_get_thread_area (struct ps_prochandle *ph,
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lwpid_t lwpid, int idx, void **base)
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{
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xtensa_elf_gregset_t regs;
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if (ptrace (PTRACE_GETREGS, lwpid, NULL, ®s) != 0)
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return PS_ERR;
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/* IDX is the bias from the thread pointer to the beginning of the
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thread descriptor. It has to be subtracted due to implementation
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quirks in libthread_db. */
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*base = (void *) ((char *) regs.threadptr - idx);
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return PS_OK;
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}
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static struct regsets_info xtensa_regsets_info =
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{
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xtensa_regsets, /* regsets */
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0, /* num_regsets */
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NULL, /* disabled_regsets */
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};
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static struct regs_info myregs_info =
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{
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NULL, /* regset_bitmap */
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NULL, /* usrregs */
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&xtensa_regsets_info
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};
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void
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xtensa_target::low_arch_setup ()
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{
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current_process ()->tdesc = tdesc_xtensa;
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}
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const regs_info *
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xtensa_target::get_regs_info ()
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{
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return &myregs_info;
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}
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/* The linux target ops object. */
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linux_process_target *the_linux_target = &the_xtensa_target;
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void
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initialize_low_arch (void)
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{
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/* Initialize the Linux target descriptions. */
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init_registers_xtensa ();
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initialize_regsets_info (&xtensa_regsets_info);
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}
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