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0db131fb83
This fixes PR 25210 by specifying the the correct ELF class for AArch64 stubs. After doing this the stub section starts behaving like a normal object file loaded from disk. That is SEC_LINKER_CREATED causes us to have to write the section manually. This flag was added as a fix for PR 24753. I believe that fix to still be correct as linker created sections don't have a size on disk and it fixes the Arm bootstrap regression. But in this case specifying the correct section class also makes the stub section not be considered by compress.c. So I'm partially revert this change so that we don't have to manage the section manually as implied by SEC_LINKER_CREATED. bfd/ChangeLog: PR 25210 PR 24753 * elfnn-aarch64.c (_bfd_aarch64_create_stub_section): Set ELF class. ld/ChangeLog: PR 25210 PR 24753 * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Remove SEC_LINKER_CREATED. * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum835769-843419. * testsuite/ld-aarch64/erratum835769-843419.d: New test.
55 lines
2.1 KiB
Makefile
55 lines
2.1 KiB
Makefile
#source: erratum835769.s
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#as:
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#ld: --fix-cortex-a53-835769 --fix-cortex-a53-843419=full -e0x400000
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#objdump: -dr
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#...
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Disassembly of section .text:
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#...
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[0-9a-f]+ <a1ldr>:
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[ \t0-9a-f]+:[ \t]+b8408c87[ \t]+ldr[ \t]+w7, \[x4, #8\]\!
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[ \t0-9a-f]+:[ \t]+1b017c06[ \t]+mul[ \t]+w6, w0, w1
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[ \t0-9a-f]+:[ \t]+f9400084[ \t]+ldr[ \t]+x4, \[x4\]
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[ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <__erratum_835769_veneer_0>
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[ \t0-9a-f]+:[ \t]+aa0503e0[ \t]+mov[ \t]+x0, x5
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[ \t0-9a-f]+:[ \t]+d65f03c0[ \t]+ret
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[0-9a-f]+ <a5ldr>:
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[ \t0-9a-f]+:[ \t]+b8408c87[ \t]+ldr[ \t]+w7, \[x4, #8\]!
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[ \t0-9a-f]+:[ \t]+1b017c06[ \t]+mul[ \t]+w6, w0, w1
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[ \t0-9a-f]+:[ \t]+f9400084[ \t]+ldr[ \t]+x4, \[x4\]
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[ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <__erratum_835769_veneer_1>
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[ \t0-9a-f]+:[ \t]+aa0503e0[ \t]+mov[ \t]+x0, x5
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[ \t0-9a-f]+:[ \t]+d65f03c0[ \t]+ret
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[0-9a-f]+ <a6ldr>:
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[ \t0-9a-f]+:[ \t]+b8408c87[ \t]+ldr[ \t]+w7, \[x4, #8\]!
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[ \t0-9a-f]+:[ \t]+1b017c06[ \t]+mul[ \t]+w6, w0, w1
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[ \t0-9a-f]+:[ \t]+f9400084[ \t]+ldr[ \t]+x4, \[x4\]
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[ \t0-9a-f]+:[ \t]+9b031885[ \t]+madd[ \t]+x5, x4, x3, x6
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[ \t0-9a-f]+:[ \t]+aa0503e0[ \t]+mov[ \t]+x0, x5
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[ \t0-9a-f]+:[ \t]+d65f03c0[ \t]+ret
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[0-9a-f]+ <a7str>:
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[ \t0-9a-f]+:[ \t]+b8408c87[ \t]+ldr[ \t]+w7, \[x4, #8\]!
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[ \t0-9a-f]+:[ \t]+1b017c06[ \t]+mul[ \t]+w6, w0, w1
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[ \t0-9a-f]+:[ \t]+f9000084[ \t]+str[ \t]+x4, \[x4\]
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[ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <__erratum_835769_veneer_2>
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[ \t0-9a-f]+:[ \t]+aa0503e0[ \t]+mov[ \t]+x0, x5
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[ \t0-9a-f]+:[ \t]+d65f03c0[ \t]+ret
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[ \t0-9a-f]+:[ \t]+d503201f[ \t]+nop
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[ \t0-9a-f]+:[ \t]+14000400[ \t]+b[ \t]+[0-9a-f]+ <__erratum_835769_veneer_0\+0xfe8>
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[ \t0-9a-f]+:[ \t]+d503201f[ \t]+nop
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[0-9a-f]+ <__erratum_835769_veneer_2>:
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[ \t0-9a-f]+:[ \t]+9b031885[ \t]+madd[ \t]+x5, x4, x3, x6
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[ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <a7str\+0x[0-9a-f]+>
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[0-9a-f]+ <__erratum_835769_veneer_1>:
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[ \t0-9a-f]+:[ \t]+9ba31845[ \t]+umaddl[ \t]+x5, w2, w3, x6
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[ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <a5ldr\+0x[0-9a-f]+>
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[0-9a-f]+ <__erratum_835769_veneer_0>:
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[ \t0-9a-f]+:[ \t]+9b031845[ \t]+madd[ \t]+x5, x2, x3, x6
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[ \t0-9a-f]+:[ \t0-9a-z]+[ \t]+b[ \t]+[0-9a-f]+ <a1ldr\+0x[0-9a-f]+>
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#pass
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