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c5e3a3641e
For these three relocations, 17 bit signed value should be used, instead of
16 bit. The bitsize field is changed from 16 to 17, this field in aarch64
backend is used for overflow check only.
bfd/
2016-02-26 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow
check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2.
ld/
2016-02-26 Renlin Li <renlin.li@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases.
* testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary.
* testsuite/ld-aarch64/emit-relocs-271.d: Likewise.
* testsuite/ld-aarch64/emit-relocs-272.d: Likewise.
* testsuite/ld-aarch64/emit-relocs-270-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-270-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-271-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-271-overflow.s: New.
* testsuite/ld-aarch64/emit-relocs-272-overflow.d: New.
* testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
6 lines
347 B
Makefile
6 lines
347 B
Makefile
#source: emit-relocs-270-overflow.s
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#ld: -T relocs.ld --defsym tempy=0x10000 --defsym tempy1=-0x10001 -e0 --emit-relocs
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#objdump: -dr
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#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_SABS_G0 against symbol `tempy' .*
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#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_SABS_G0 against symbol `tempy1' .*
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