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adf8243ba9
This will allow to format output of "info reg" command as we wish, without breaking the tests. In particular, it'll let us correctly align raw and natural values of the registers using spaces instead of current badly-working approach with tabs. This change is forwards- and backwards-compatible, so that the amended tests will work in the same way before and after reformatting patches (unless the tests check formatting, of course, but I've not come across any such tests). Some tests already used this expected pattern, so they didn't even have to be modified. Others are changed by this patch. I've checked this on a i386 system, with no noticeable differences in test results, so at least on i386 nothing seems to be broken by this. gdb/testsuite/ChangeLog: * gdb.arch/powerpc-d128-regs.exp: Replace expected "\[\t\]*" from "info reg" with "\[ \t\]*". * gdb.arch/altivec-regs.exp: Replace expected "\t" from "info reg" with "\[ \t\]+". * gdb.arch/s390-multiarch.exp: Ditto. * gdb.base/pc-fp.exp: Ditto. * gdb.reverse/i386-precsave.exp: Ditto. * gdb.reverse/i386-reverse.exp: Ditto. * gdb.reverse/i387-env-reverse.exp: Ditto. * gdb.reverse/i387-stack-reverse.exp: Ditto.
217 lines
6.8 KiB
Plaintext
217 lines
6.8 KiB
Plaintext
# Copyright (C) 2002-2018 Free Software Foundation, Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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#
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# Tests for Powerpc AltiVec register setting and fetching
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#
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# Test the use of registers, especially AltiVec registers, for Powerpc.
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# This file uses altivec-regs.c for input.
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#
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if {![istarget "powerpc*"] || [skip_altivec_tests]} then {
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verbose "Skipping altivec register tests."
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return
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}
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standard_testfile
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set compile_flags {debug nowarnings}
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if [get_compiler_info] {
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warning "get_compiler failed"
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return -1
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}
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if [test_compiler_info gcc*] {
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set compile_flags "$compile_flags additional_flags=-maltivec additional_flags=-mabi=altivec"
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} elseif [test_compiler_info xlc*] {
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set compile_flags "$compile_flags additional_flags=-qaltivec"
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} else {
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warning "unknown compiler"
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return -1
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}
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if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile} executable $compile_flags] != "" } {
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untested "failed to compile"
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return -1
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}
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gdb_start
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gdb_reinitialize_dir $srcdir/$subdir
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gdb_load ${binfile}
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#
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# Run to `main' where we begin our tests.
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#
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if ![runto_main] then {
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gdb_suppress_tests
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}
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gdb_test "set print frame-arguments all"
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# set all the registers integer portions to 1
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for {set i 0} {$i < 32} {incr i 1} {
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for {set j 0} {$j < 4} {incr j 1} {
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gdb_test "set \$vr$i.v4_int32\[$j\] = 1" "" "set reg vr$i.v4si.f\[$j\]"
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}
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}
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gdb_test "set \$vscr = 1" "" ""
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gdb_test "set \$vrsave = 1" "" ""
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# Now execute some target code, so that GDB's register cache is flushed.
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gdb_test "next" "" ""
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set endianness [get_endianness]
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# And then read the AltiVec registers back, to see that
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# a) the register write above worked, and
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# b) the register read (below) also works.
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if {$endianness == "big"} {
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set vector_register ".uint128 = 0x1000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
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} else {
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set vector_register ".uint128 = 0x1000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
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}
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for {set i 0} {$i < 32} {incr i 1} {
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gdb_test "info reg vr$i" "vr$i.*$vector_register" "info reg vr$i"
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}
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gdb_test "info reg vrsave" "vrsave.*0x1\[ \t\]+1" "info reg vrsave"
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gdb_test "info reg vscr" "vscr.*0x1\[ \t\]+1" "info reg vscr"
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# Now redo the same tests, but using the print command.
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# Note: in LE case, the char array is printed WITHOUT the last character.
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# Gdb treats the terminating null char in the array like the terminating
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# null char in a string and doesn't print it. This is not a failure, but
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# the way gdb works.
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if {$endianness == "big"} {
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set decimal_vector ".uint128 = 79228162532711081671548469249, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = .0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1.."
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} else {
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set decimal_vector ".uint128 = 79228162532711081671548469249, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = .1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0.."
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}
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for {set i 0} {$i < 32} {incr i 1} {
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gdb_test "print \$vr$i" ".* = $decimal_vector" "print vr$i"
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}
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gdb_test "print \$vrsave" ".* = 1" "print vrsave"
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gdb_test "print \$vscr" ".* = 1" "print vscr"
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for {set i 0} {$i < 32} {incr i 1} {
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set pattern$i ".*vr$i.*"
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append pattern$i $vector_register
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}
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send_gdb "info vector\n"
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gdb_expect_list "info vector" ".*$gdb_prompt $" {
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[$pattern0]
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[$pattern1]
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[$pattern2]
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[$pattern3]
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[$pattern4]
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[$pattern5]
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[$pattern6]
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[$pattern7]
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[$pattern8]
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[$pattern9]
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[$pattern10]
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[$pattern11]
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[$pattern12]
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[$pattern13]
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[$pattern14]
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[$pattern15]
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[$pattern16]
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[$pattern17]
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[$pattern18]
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[$pattern19]
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[$pattern20]
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[$pattern21]
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[$pattern22]
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[$pattern23]
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[$pattern24]
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[$pattern25]
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[$pattern26]
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[$pattern27]
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[$pattern28]
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[$pattern29]
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[$pattern30]
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[$pattern31]
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"\[ \t\n\r\]+vscr\[ \t\]+0x1"
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"\[ \t\n\r\]+vrsave\[ \t\]+0x1"
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}
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gdb_test "break vector_fun" \
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"Breakpoint 2 at.*altivec-regs.c, line \[0-9\]+\\." \
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"set breakpoint at vector_fun"
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# Actually it is nuch easier to see these results printed in hex.
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gdb_test "set output-radix 16" \
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"Output radix now set to decimal 16, hex 10, octal 20." \
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"set output radix to hex"
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gdb_test "continue" \
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"Breakpoint 2, vector_fun .a=.0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe., b=.0x1010101, 0x1010101, 0x1010101, 0x1010101.*altivec-regs.c.*vec_splat_u8.2..;" \
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"continue to vector_fun"
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# Do a next over the assignment to vector 'a'.
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gdb_test "next" ".*b = \\(\\(vector unsigned int\\) vec_splat_u8\\(3\\)\\);" \
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"next (1)"
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# Do a next over the assignment to vector 'b'.
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gdb_test "next" "c = vec_add \\(a, b\\);" \
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"next (2)"
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# Now 'a' should be '0x02020202...' and 'b' should be '0x03030303...'
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gdb_test "print/x a" \
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".*= .0x2020202, 0x2020202, 0x2020202, 0x2020202." \
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"print vector parameter a"
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gdb_test "print/x b" \
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".*= .0x3030303, 0x3030303, 0x3030303, 0x3030303." \
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"print vector parameter b"
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# If we do an 'up' now, and print 'x' and 'y' we should see the values they
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# have in main, not the values they have in vector_fun.
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gdb_test "up" ".1.*main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);" \
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"up to main"
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gdb_test "print/x x" \
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".*= .0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe." \
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"print vector x"
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gdb_test "print/x y" \
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".*= .0x1010101, 0x1010101, 0x1010101, 0x1010101." \
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"print vector y"
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# now go back to vector_func and do a finish, to see if we can print the return
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# value correctly.
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gdb_test "down" \
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".0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*c = vec_add \\(a, b\\);" \
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"down to vector_fun"
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gdb_test "finish" \
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"Run till exit from .0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*in main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);.*Value returned is.*= .0x5050505, 0x5050505, 0x5050505, 0x5050505." \
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"finish returned correct value"
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