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60da007931
(sh_table): Added many SH3 opcodes. * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC.
300 lines
6.4 KiB
C
300 lines
6.4 KiB
C
/* Disassemble SH instructions.
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Copyright (C) 1993, 1995 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#define STATIC_TABLE
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#define DEFINE_TABLE
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#include "sh-opc.h"
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#include "dis-asm.h"
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#define LITTLE_BIT 2
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static int
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print_insn_shx(memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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{
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fprintf_ftype fprintf = info->fprintf_func;
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void *stream = info->stream;
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unsigned char insn[2];
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unsigned char nibs[4];
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int status;
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int relmask = ~0;
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sh_opcode_info *op;
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status = info->read_memory_func(memaddr, insn, 2, info);
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if (status != 0)
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{
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info->memory_error_func(status, memaddr, info);
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return -1;
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}
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if (info->flags & LITTLE_BIT)
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{
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nibs[0] = (insn[1] >> 4) & 0xf;
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nibs[1] = insn[1] & 0xf;
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nibs[2] = (insn[0] >> 4) & 0xf;
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nibs[3] = insn[0] & 0xf;
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}
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else
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{
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nibs[0] = (insn[0] >> 4) & 0xf;
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nibs[1] = insn[0] & 0xf;
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nibs[2] = (insn[1] >> 4) & 0xf;
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nibs[3] = insn[1] & 0xf;
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}
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for (op = sh_table; op->name; op++)
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{
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int n;
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int imm;
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int rn;
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int rm;
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for (n = 0; n < 4; n++) {
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int i = op->nibbles[n];
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if (i < 16)
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{
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if (nibs[n] == i) continue;
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goto fail;
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}
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switch (i)
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{
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case BRANCH_8:
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imm = (nibs[2] << 4) | (nibs[3]);
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if (imm & 0x80)
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imm |= ~0xff;
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imm = ((char)imm) * 2 + 4 ;
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goto ok;
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case BRANCH_12:
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imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]);
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if (imm & 0x800)
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imm |= ~0xfff;
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imm = imm * 2 + 4;
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goto ok;
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case IMM_4:
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imm = nibs[3];
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goto ok;
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case IMM_4BY2:
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imm = nibs[3] <<1;
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goto ok;
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case IMM_4BY4:
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imm = nibs[3] <<2;
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goto ok;
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case IMM_8:
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imm = (nibs[2] << 4) | nibs[3];
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goto ok;
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case PCRELIMM_8BY2:
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imm = ((nibs[2] << 4) | nibs[3]) <<1;
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relmask = ~1;
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goto ok;
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case PCRELIMM_8BY4:
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imm = ((nibs[2] << 4) | nibs[3]) <<2;
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relmask = ~3;
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goto ok;
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case IMM_8BY2:
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imm = ((nibs[2] << 4) | nibs[3]) <<1;
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goto ok;
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case IMM_8BY4:
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imm = ((nibs[2] << 4) | nibs[3]) <<2;
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goto ok;
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case DISP_8:
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imm = (nibs[2] << 4) | (nibs[3]);
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goto ok;
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case DISP_4:
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imm = nibs[3];
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goto ok;
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case REG_N:
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rn = nibs[n];
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break;
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case REG_M:
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rm = nibs[n];
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break;
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default:
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abort();
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}
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}
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ok:
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fprintf(stream,"%s\t", op->name);
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for (n = 0; n < 3 && op->arg[n] != A_END; n++)
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{
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if (n && op->arg[1] != A_END)
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fprintf(stream,",");
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switch (op->arg[n])
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{
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case A_IMM:
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fprintf(stream,"#%d", (char)(imm));
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break;
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case A_R0:
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fprintf(stream,"r0");
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break;
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case A_REG_N:
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fprintf(stream,"r%d", rn);
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break;
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case A_INC_N:
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fprintf(stream,"@r%d+", rn);
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break;
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case A_DEC_N:
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fprintf(stream,"@-r%d", rn);
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break;
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case A_IND_N:
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fprintf(stream,"@r%d", rn);
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break;
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case A_DISP_REG_N:
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fprintf(stream,"@(%d,r%d)",imm, rn);
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break;
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case A_REG_M:
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fprintf(stream,"r%d", rm);
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break;
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case A_INC_M:
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fprintf(stream,"@r%d+", rm);
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break;
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case A_DEC_M:
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fprintf(stream,"@-r%d", rm);
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break;
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case A_IND_M:
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fprintf(stream,"@r%d", rm);
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break;
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case A_DISP_REG_M:
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fprintf(stream,"@(%d,r%d)",imm, rm);
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break;
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case A_DISP_PC:
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fprintf(stream,"0x%0x", imm+ 4+(memaddr&relmask));
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break;
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case A_IND_R0_REG_N:
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fprintf(stream,"@(r0,r%d)", rn);
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break;
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case A_IND_R0_REG_M:
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fprintf(stream,"@(r0,r%d)", rm);
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break;
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case A_DISP_GBR:
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fprintf(stream,"@(%d,gbr)",imm);
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break;
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case A_R0_GBR:
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fprintf(stream,"@(r0,gbr)");
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break;
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case A_BDISP12:
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case A_BDISP8:
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(*info->print_address_func) (imm + memaddr, info);
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break;
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case A_SR:
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fprintf(stream,"sr");
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break;
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case A_GBR:
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fprintf(stream,"gbr");
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break;
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case A_VBR:
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fprintf(stream,"vbr");
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break;
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case A_SSR:
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fprintf(stream,"ssr");
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break;
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case A_SPC:
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fprintf(stream,"spc");
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break;
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case A_MACH:
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fprintf(stream,"mach");
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break;
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case A_MACL:
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fprintf(stream,"macl");
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break;
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case A_PR:
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fprintf(stream,"pr");
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break;
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/* start-sanitize-sh3e */
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case F_REG_N:
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fprintf(stream,"fr%d", rn);
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break;
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case F_REG_M:
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fprintf(stream,"fr%d", rm);
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break;
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case FPSCR_M:
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case FPSCR_N:
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fprintf(stream,"fpscr");
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break;
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case FPUL_M:
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case FPUL_N:
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fprintf(stream,"fpul");
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break;
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case F_FR0:
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fprintf(stream,"fr0");
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break;
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/* end-sanitize-sh3e */
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default:
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abort();
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}
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}
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if (!(info->flags & 1)
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&& (op->name[0] == 'j'
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|| (op->name[0] == 'b'
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&& (op->name[1] == 'r'
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|| op->name[1] == 's'))
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|| (op->name[0] == 'r' && op->name[1] == 't')
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|| (op->name[0] == 'b' && op->name[2] == '.')))
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{
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info->flags |= 1;
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fprintf(stream,"\t(slot "); print_insn_shx(memaddr +2, info);
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info->flags &= ~1;
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fprintf(stream,")");
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return 4;
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}
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return 2;
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fail:
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;
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}
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fprintf(stream,".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]);
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return 2;
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}
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int
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print_insn_shl(memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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{
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int r;
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info->flags = LITTLE_BIT;
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r =print_insn_shx (memaddr, info);
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return r;
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}
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int
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print_insn_sh(memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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{
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int r;
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info->flags = 0;
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r =print_insn_shx (memaddr, info);
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return r;
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}
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