binutils-gdb/ld/testsuite/ld-arm/tls-app.d
Will Newton 6a2619f953 Fix tests when configured for arm-linux and arm-elf
With this change all gas and most ld tests pass when configured for
arm-linux. It doesn't look like these configurations have been
tested in a long time but this attempts to stem the bit-rot slightly.

gas/testsuite/ChangeLog:

2014-07-10  Will Newton  <will.newton@linaro.org>

	* gas/arm/bl-local-2.d: Only enable the test on EABI and
	NaCl configurations.
	* gas/arm/bl-local-v4t.d: Likewise.
	* gas/arm/blx-local.d: Likewise.
	* gas/arm/branch-reloc.d: Likewise.

ld/testsuite/ChangeLog:

2014-07-10  Will Newton  <will.newton@linaro.org>

	* ld-arm/arm-elf.exp (armelftests_nonacl): Move Cortex-A8 fix
	tests, IFUNC tests and other EABI requiring tests to...
	(armeabitests_nonacl): ...here.
	* ld-arm/arm-app-abs32.d: Loosen regex for architecture type
	to allow test to pass on configurations without an attributes
	section.
	* ld-arm/arm-app.d: Likewise.
	* ld-arm/arm-lib-plt32.d: Likewise.
	* ld-arm/arm-lib.d: Likewise.
	* ld-arm/arm-static-app.d: Likewise.
	* ld-arm/armthumb-lib.d: Likewise.
	* ld-arm/cortex-a8-far.d: Likewise.
	* ld-arm/farcall-mixed-app.d: Likewise.
	* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
	* ld-arm/farcall-mixed-lib.d: Likewise.
	* ld-arm/mixed-app-v5.d: Likewise.
	* ld-arm/mixed-app.d: Likewise.
	* ld-arm/mixed-lib.d: Likewise.
	* ld-arm/tls-app.d: Likewise.
	* ld-arm/tls-descrelax-be32.d: Likewise.
	* ld-arm/tls-descrelax.d: Likewise.
	* ld-arm/tls-descseq.d: Likewise.
	* ld-arm/tls-gdesc-got.d: Likewise.
	* ld-arm/tls-gdesc.d: Likewise.
	* ld-arm/tls-gdierelax.d: Likewise.
	* ld-arm/tls-gdierelax2.d: Likewise.
	* ld-arm/tls-gdlerelax.d: Likewise.
	* ld-arm/tls-lib-loc.d: Likewise.
	* ld-arm/tls-lib.d: Likewise.
	* ld-arm/tls-thumb1.d: Likewise.
2014-07-10 09:32:56 +01:00

19 lines
512 B
Makefile

.*: file format elf32-.*arm.*
architecture: arm.*, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x000081c8
Disassembly of section .text:
000081c8 <foo>:
81c8: e1a00000 nop ; \(mov r0, r0\)
81cc: e1a00000 nop ; \(mov r0, r0\)
81d0: e1a0f00e mov pc, lr
81d4: 000080bc .word 0x000080bc
81d8: 000080b4 .word 0x000080b4
81dc: 000080ac .word 0x000080ac
81e0: 00000004 .word 0x00000004
81e4: 000080c4 .word 0x000080c4
81e8: 00000014 .word 0x00000014