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9239bbd3a6
bfd/ PR ld/20030 * elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding. (stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs to nb_words. (create_instruction_vldmia): Add is_dp to disambiguate SP/DP encoding. (create_instruction_vldmdb): Likewise. (stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding, uses it to re-encode. ld/ PR ld/20030 * testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp tests. Fix misnamed stm32l4xx-fix-all. * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple loads with DP registers. * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file. * testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment. * testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple loads with DP registers. * testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference.
28 lines
730 B
ArmAsm
28 lines
730 B
ArmAsm
.syntax unified
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.cpu cortex-m4
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.fpu fpv4-sp-d16
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.text
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.align 1
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.thumb
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.thumb_func
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.global _start
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_start:
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@ VLDM CASE #1
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@ vldm rx, {...}
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@ -> vldm rx!, {8_words_or_less} for each
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@ -> sub rx, rx, #size (list)
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vldm r9, {s1-s31}
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@ VLDM CASE #2
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@ vldm rx!, {...}
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@ -> vldm rx!, {8_words_or_less} for each needed 8_word
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@ This also handles vpop instruction (when rx is sp)
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vldm r6!, {s9-s29}
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@ Explicit VPOP test
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vpop {s1-s9}
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@ VLDM CASE #3
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@ vldmd rx!, {...}
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@ -> vldmb rx!, {8_words_or_less} for each needed 8_word
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vldmdb r11!, {s1-s31}
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