mirror of
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9d4f36166d
This regenerates sim files. Tested with the following tools from a recent binutils build in sim-site-config.exp, plus a few cross compilers. set AS_FOR_TARGET_AARCH64 "/home/alan/build/gas/aarch64-linux-gnu/gas/as-new" set LD_FOR_TARGET_AARCH64 "/home/alan/build/gas/aarch64-linux-gnu/ld/ld-new" set CC_FOR_TARGET_AARCH64 "aarch64-linux-gnu-gcc" set AS_FOR_TARGET_ARM "/home/alan/build/gas/arm-linux-gnueabi/gas/as-new" set LD_FOR_TARGET_ARM "/home/alan/build/gas/arm-linux-gnueabi/ld/ld-new" set CC_FOR_TARGET_ARM "arm-linux-gnueabi-gcc" set AS_FOR_TARGET_AVR "/home/alan/build/gas/avr-elf/gas/as-new" set LD_FOR_TARGET_AVR "/home/alan/build/gas/avr-elf/ld/ld-new" set CC_FOR_TARGET_AVR "" set AS_FOR_TARGET_BFIN "/home/alan/build/gas/bfin-elf/gas/as-new" set LD_FOR_TARGET_BFIN "/home/alan/build/gas/bfin-elf/ld/ld-new" set CC_FOR_TARGET_BFIN "" set AS_FOR_TARGET_BPF "/home/alan/build/gas/bpf-none/gas/as-new" set LD_FOR_TARGET_BPF "/home/alan/build/gas/bpf-none/ld/ld-new" set CC_FOR_TARGET_BPF "" set AS_FOR_TARGET_CR16 "/home/alan/build/gas/cr16-elf/gas/as-new" set LD_FOR_TARGET_CR16 "/home/alan/build/gas/cr16-elf/ld/ld-new" set CC_FOR_TARGET_CR16 "" set AS_FOR_TARGET_CRIS "/home/alan/build/gas/cris-elf/gas/as-new" set LD_FOR_TARGET_CRIS "/home/alan/build/gas/cris-elf/ld/ld-new" set CC_FOR_TARGET_CRIS "" set AS_FOR_TARGET_D10V "/home/alan/build/gas/d10v-elf/gas/as-new" set LD_FOR_TARGET_D10V "/home/alan/build/gas/d10v-elf/ld/ld-new" set CC_FOR_TARGET_D10V "" set AS_FOR_TARGET_FRV "/home/alan/build/gas/frv-elf/gas/as-new" set LD_FOR_TARGET_FRV "/home/alan/build/gas/frv-elf/ld/ld-new" set CC_FOR_TARGET_FRV "" set AS_FOR_TARGET_FT32 "/home/alan/build/gas/ft32-elf/gas/as-new" set LD_FOR_TARGET_FT32 "/home/alan/build/gas/ft32-elf/ld/ld-new" set CC_FOR_TARGET_FT32 "" set AS_FOR_TARGET_H8300 "/home/alan/build/gas/h8300-elf/gas/as-new" set LD_FOR_TARGET_H8300 "/home/alan/build/gas/h8300-elf/ld/ld-new" set CC_FOR_TARGET_H8300 "" set AS_FOR_TARGET_IQ2000 "/home/alan/build/gas/iq2000-elf/gas/as-new" set LD_FOR_TARGET_IQ2000 "/home/alan/build/gas/iq2000-elf/ld/ld-new" set CC_FOR_TARGET_IQ2000 "" set AS_FOR_TARGET_LM32 "/home/alan/build/gas/lm32-linux-gnu/gas/as-new" set LD_FOR_TARGET_LM32 "/home/alan/build/gas/lm32-linux-gnu/ld/ld-new" set CC_FOR_TARGET_LM32 "" set AS_FOR_TARGET_M32C "/home/alan/build/gas/m32c-elf/gas/as-new" set LD_FOR_TARGET_M32C "/home/alan/build/gas/m32c-elf/ld/ld-new" set CC_FOR_TARGET_M32C "" set AS_FOR_TARGET_M32R "/home/alan/build/gas/m32r-elf/gas/as-new" set LD_FOR_TARGET_M32R "/home/alan/build/gas/m32r-elf/ld/ld-new" set CC_FOR_TARGET_M32R "" set AS_FOR_TARGET_M68HC11 "/home/alan/build/gas/m68hc11-elf/gas/as-new" set LD_FOR_TARGET_M68HC11 "/home/alan/build/gas/m68hc11-elf/ld/ld-new" set CC_FOR_TARGET_M68HC11 "" set AS_FOR_TARGET_MCORE "/home/alan/build/gas/mcore-elf/gas/as-new" set LD_FOR_TARGET_MCORE "/home/alan/build/gas/mcore-elf/ld/ld-new" set CC_FOR_TARGET_MCORE "" set AS_FOR_TARGET_MICROBLAZE "/home/alan/build/gas/microblaze-linux-gnu/gas/as-new" set LD_FOR_TARGET_MICROBLAZE "/home/alan/build/gas/microblaze-linux-gnu/ld/ld-new" set CC_FOR_TARGET_MICROBLAZE "microblaze-linux-gnu-gcc" set AS_FOR_TARGET_MIPS "/home/alan/build/gas/mips-linux-gnu/gas/as-new" set LD_FOR_TARGET_MIPS "/home/alan/build/gas/mips-linux-gnu/ld/ld-new" set CC_FOR_TARGET_MIPS "mips-linux-gnu-gcc" set AS_FOR_TARGET_MN10300 "/home/alan/build/gas/mn10300-elf/gas/as-new" set LD_FOR_TARGET_MN10300 "/home/alan/build/gas/mn10300-elf/ld/ld-new" set CC_FOR_TARGET_MN10300 "" set AS_FOR_TARGET_MOXIE "/home/alan/build/gas/moxie-elf/gas/as-new" set LD_FOR_TARGET_MOXIE "/home/alan/build/gas/moxie-elf/ld/ld-new" set CC_FOR_TARGET_MOXIE "" set AS_FOR_TARGET_MSP430 "/home/alan/build/gas/msp430-elf/gas/as-new" set LD_FOR_TARGET_MSP430 "/home/alan/build/gas/msp430-elf/ld/ld-new" set CC_FOR_TARGET_MSP430 "" set AS_FOR_TARGET_OR1K "/home/alan/build/gas/or1k-linux-gnu/gas/as-new" set LD_FOR_TARGET_OR1K "/home/alan/build/gas/or1k-linux-gnu/ld/ld-new" set CC_FOR_TARGET_OR1K "" set AS_FOR_TARGET_PPC "/home/alan/build/gas/powerpc-linux-gnu/gas/as-new" set LD_FOR_TARGET_PPC "/home/alan/build/gas/powerpc-linux-gnu/ld/ld-new" set CC_FOR_TARGET_PPC "powerpc-linux-gnu-gcc" set AS_FOR_TARGET_PRU "/home/alan/build/gas/pru-elf/gas/as-new" set LD_FOR_TARGET_PRU "/home/alan/build/gas/pru-elf/ld/ld-new" set CC_FOR_TARGET_PRU "" set AS_FOR_TARGET_RISCV "/home/alan/build/gas/riscv32-elf/gas/as-new" set LD_FOR_TARGET_RISCV "/home/alan/build/gas/riscv32-elf/ld/ld-new" set CC_FOR_TARGET_RISCV "" set AS_FOR_TARGET_RL78 "/home/alan/build/gas/rl78-elf/gas/as-new" set LD_FOR_TARGET_RL78 "/home/alan/build/gas/rl78-elf/ld/ld-new" set CC_FOR_TARGET_RL78 "" set AS_FOR_TARGET_RX "/home/alan/build/gas/rx-elf/gas/as-new" set LD_FOR_TARGET_RX "/home/alan/build/gas/rx-elf/ld/ld-new" set CC_FOR_TARGET_RX "" set AS_FOR_TARGET_SH "/home/alan/build/gas/sh-rtems/gas/as-new" set LD_FOR_TARGET_SH "/home/alan/build/gas/sh-rtems/ld/ld-new" set CC_FOR_TARGET_SH "" set AS_FOR_TARGET_ERC32 "" set LD_FOR_TARGET_ERC32 "" set CC_FOR_TARGET_ERC32 "" set AS_FOR_TARGET_V850 "/home/alan/build/gas/v850-elf/gas/as-new" set LD_FOR_TARGET_V850 "/home/alan/build/gas/v850-elf/ld/ld-new" set CC_FOR_TARGET_V850 "" Results both before and after were: FAIL: crisv10 mem1.ms (execution) FAIL: crisv10 mem2.ms (execution) FAIL: crisv32 mem1.ms (execution) FAIL: crisv32 mem2.ms (execution) FAIL: microblaze fail.s (execution) FAIL: microblaze pass.s (execution) expected passes 5288 unexpected failures 6 expected failures 3 untested testcases 373 unsupported tests 14
142 lines
10 KiB
C
142 lines
10 KiB
C
/* Decode header for crisv10f.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996-2023 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef CRISV10F_DECODE_H
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#define CRISV10F_DECODE_H
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extern const IDESC *crisv10f_decode (SIM_CPU *, IADDR,
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CGEN_INSN_WORD,
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ARGBUF *);
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extern void crisv10f_init_idesc_table (SIM_CPU *);
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extern void crisv10f_sem_init_idesc_table (SIM_CPU *);
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extern void crisv10f_semf_init_idesc_table (SIM_CPU *);
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/* Enum declaration for instructions in cpu family crisv10f. */
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typedef enum crisv10f_insn_type {
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CRISV10F_INSN_X_INVALID, CRISV10F_INSN_X_AFTER, CRISV10F_INSN_X_BEFORE, CRISV10F_INSN_X_CTI_CHAIN
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, CRISV10F_INSN_X_CHAIN, CRISV10F_INSN_X_BEGIN, CRISV10F_INSN_NOP, CRISV10F_INSN_MOVE_B_R
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, CRISV10F_INSN_MOVE_W_R, CRISV10F_INSN_MOVE_D_R, CRISV10F_INSN_MOVEPCR, CRISV10F_INSN_MOVEQ
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, CRISV10F_INSN_MOVS_B_R, CRISV10F_INSN_MOVS_W_R, CRISV10F_INSN_MOVU_B_R, CRISV10F_INSN_MOVU_W_R
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, CRISV10F_INSN_MOVECBR, CRISV10F_INSN_MOVECWR, CRISV10F_INSN_MOVECDR, CRISV10F_INSN_MOVSCBR
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, CRISV10F_INSN_MOVSCWR, CRISV10F_INSN_MOVUCBR, CRISV10F_INSN_MOVUCWR, CRISV10F_INSN_ADDQ
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, CRISV10F_INSN_SUBQ, CRISV10F_INSN_CMP_R_B_R, CRISV10F_INSN_CMP_R_W_R, CRISV10F_INSN_CMP_R_D_R
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, CRISV10F_INSN_CMP_M_B_M, CRISV10F_INSN_CMP_M_W_M, CRISV10F_INSN_CMP_M_D_M, CRISV10F_INSN_CMPCBR
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, CRISV10F_INSN_CMPCWR, CRISV10F_INSN_CMPCDR, CRISV10F_INSN_CMPQ, CRISV10F_INSN_CMPS_M_B_M
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, CRISV10F_INSN_CMPS_M_W_M, CRISV10F_INSN_CMPSCBR, CRISV10F_INSN_CMPSCWR, CRISV10F_INSN_CMPU_M_B_M
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, CRISV10F_INSN_CMPU_M_W_M, CRISV10F_INSN_CMPUCBR, CRISV10F_INSN_CMPUCWR, CRISV10F_INSN_MOVE_M_B_M
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, CRISV10F_INSN_MOVE_M_W_M, CRISV10F_INSN_MOVE_M_D_M, CRISV10F_INSN_MOVS_M_B_M, CRISV10F_INSN_MOVS_M_W_M
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, CRISV10F_INSN_MOVU_M_B_M, CRISV10F_INSN_MOVU_M_W_M, CRISV10F_INSN_MOVE_R_SPRV10, CRISV10F_INSN_MOVE_SPR_RV10
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, CRISV10F_INSN_RET_TYPE, CRISV10F_INSN_MOVE_M_SPRV10, CRISV10F_INSN_MOVE_C_SPRV10_P5, CRISV10F_INSN_MOVE_C_SPRV10_P9
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, CRISV10F_INSN_MOVE_C_SPRV10_P10, CRISV10F_INSN_MOVE_C_SPRV10_P11, CRISV10F_INSN_MOVE_C_SPRV10_P12, CRISV10F_INSN_MOVE_C_SPRV10_P13
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, CRISV10F_INSN_MOVE_C_SPRV10_P7, CRISV10F_INSN_MOVE_C_SPRV10_P14, CRISV10F_INSN_MOVE_C_SPRV10_P15, CRISV10F_INSN_MOVE_SPR_MV10
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, CRISV10F_INSN_SBFS, CRISV10F_INSN_MOVEM_R_M, CRISV10F_INSN_MOVEM_M_R, CRISV10F_INSN_MOVEM_M_PC
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, CRISV10F_INSN_ADD_B_R, CRISV10F_INSN_ADD_W_R, CRISV10F_INSN_ADD_D_R, CRISV10F_INSN_ADD_M_B_M
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, CRISV10F_INSN_ADD_M_W_M, CRISV10F_INSN_ADD_M_D_M, CRISV10F_INSN_ADDCBR, CRISV10F_INSN_ADDCWR
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, CRISV10F_INSN_ADDCDR, CRISV10F_INSN_ADDCPC, CRISV10F_INSN_ADDS_B_R, CRISV10F_INSN_ADDS_W_R
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, CRISV10F_INSN_ADDS_M_B_M, CRISV10F_INSN_ADDS_M_W_M, CRISV10F_INSN_ADDSCBR, CRISV10F_INSN_ADDSCWR
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, CRISV10F_INSN_ADDSPCPC, CRISV10F_INSN_ADDU_B_R, CRISV10F_INSN_ADDU_W_R, CRISV10F_INSN_ADDU_M_B_M
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, CRISV10F_INSN_ADDU_M_W_M, CRISV10F_INSN_ADDUCBR, CRISV10F_INSN_ADDUCWR, CRISV10F_INSN_SUB_B_R
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, CRISV10F_INSN_SUB_W_R, CRISV10F_INSN_SUB_D_R, CRISV10F_INSN_SUB_M_B_M, CRISV10F_INSN_SUB_M_W_M
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, CRISV10F_INSN_SUB_M_D_M, CRISV10F_INSN_SUBCBR, CRISV10F_INSN_SUBCWR, CRISV10F_INSN_SUBCDR
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, CRISV10F_INSN_SUBS_B_R, CRISV10F_INSN_SUBS_W_R, CRISV10F_INSN_SUBS_M_B_M, CRISV10F_INSN_SUBS_M_W_M
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, CRISV10F_INSN_SUBSCBR, CRISV10F_INSN_SUBSCWR, CRISV10F_INSN_SUBU_B_R, CRISV10F_INSN_SUBU_W_R
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, CRISV10F_INSN_SUBU_M_B_M, CRISV10F_INSN_SUBU_M_W_M, CRISV10F_INSN_SUBUCBR, CRISV10F_INSN_SUBUCWR
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, CRISV10F_INSN_ADDI_B_R, CRISV10F_INSN_ADDI_W_R, CRISV10F_INSN_ADDI_D_R, CRISV10F_INSN_NEG_B_R
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, CRISV10F_INSN_NEG_W_R, CRISV10F_INSN_NEG_D_R, CRISV10F_INSN_TEST_M_B_M, CRISV10F_INSN_TEST_M_W_M
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, CRISV10F_INSN_TEST_M_D_M, CRISV10F_INSN_MOVE_R_M_B_M, CRISV10F_INSN_MOVE_R_M_W_M, CRISV10F_INSN_MOVE_R_M_D_M
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, CRISV10F_INSN_MULS_B, CRISV10F_INSN_MULS_W, CRISV10F_INSN_MULS_D, CRISV10F_INSN_MULU_B
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, CRISV10F_INSN_MULU_W, CRISV10F_INSN_MULU_D, CRISV10F_INSN_MSTEP, CRISV10F_INSN_DSTEP
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, CRISV10F_INSN_ABS, CRISV10F_INSN_AND_B_R, CRISV10F_INSN_AND_W_R, CRISV10F_INSN_AND_D_R
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, CRISV10F_INSN_AND_M_B_M, CRISV10F_INSN_AND_M_W_M, CRISV10F_INSN_AND_M_D_M, CRISV10F_INSN_ANDCBR
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, CRISV10F_INSN_ANDCWR, CRISV10F_INSN_ANDCDR, CRISV10F_INSN_ANDQ, CRISV10F_INSN_ORR_B_R
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, CRISV10F_INSN_ORR_W_R, CRISV10F_INSN_ORR_D_R, CRISV10F_INSN_OR_M_B_M, CRISV10F_INSN_OR_M_W_M
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, CRISV10F_INSN_OR_M_D_M, CRISV10F_INSN_ORCBR, CRISV10F_INSN_ORCWR, CRISV10F_INSN_ORCDR
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, CRISV10F_INSN_ORQ, CRISV10F_INSN_XOR, CRISV10F_INSN_SWAP, CRISV10F_INSN_ASRR_B_R
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, CRISV10F_INSN_ASRR_W_R, CRISV10F_INSN_ASRR_D_R, CRISV10F_INSN_ASRQ, CRISV10F_INSN_LSRR_B_R
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, CRISV10F_INSN_LSRR_W_R, CRISV10F_INSN_LSRR_D_R, CRISV10F_INSN_LSRQ, CRISV10F_INSN_LSLR_B_R
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, CRISV10F_INSN_LSLR_W_R, CRISV10F_INSN_LSLR_D_R, CRISV10F_INSN_LSLQ, CRISV10F_INSN_BTST
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, CRISV10F_INSN_BTSTQ, CRISV10F_INSN_SETF, CRISV10F_INSN_CLEARF, CRISV10F_INSN_BCC_B
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, CRISV10F_INSN_BA_B, CRISV10F_INSN_BCC_W, CRISV10F_INSN_BA_W, CRISV10F_INSN_JUMP_R
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, CRISV10F_INSN_JUMP_M, CRISV10F_INSN_JUMP_C, CRISV10F_INSN_BREAK, CRISV10F_INSN_BOUND_R_B_R
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, CRISV10F_INSN_BOUND_R_W_R, CRISV10F_INSN_BOUND_R_D_R, CRISV10F_INSN_BOUND_M_B_M, CRISV10F_INSN_BOUND_M_W_M
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, CRISV10F_INSN_BOUND_M_D_M, CRISV10F_INSN_BOUND_CB, CRISV10F_INSN_BOUND_CW, CRISV10F_INSN_BOUND_CD
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, CRISV10F_INSN_SCC, CRISV10F_INSN_LZ, CRISV10F_INSN_ADDOQ, CRISV10F_INSN_BDAPQPC
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, CRISV10F_INSN_BDAP_32_PC, CRISV10F_INSN_MOVE_M_PCPLUS_P0, CRISV10F_INSN_MOVE_M_SPPLUS_P8, CRISV10F_INSN_ADDO_M_B_M
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, CRISV10F_INSN_ADDO_M_W_M, CRISV10F_INSN_ADDO_M_D_M, CRISV10F_INSN_ADDO_CB, CRISV10F_INSN_ADDO_CW
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, CRISV10F_INSN_ADDO_CD, CRISV10F_INSN_DIP_M, CRISV10F_INSN_DIP_C, CRISV10F_INSN_ADDI_ACR_B_R
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, CRISV10F_INSN_ADDI_ACR_W_R, CRISV10F_INSN_ADDI_ACR_D_R, CRISV10F_INSN_BIAP_PC_B_R, CRISV10F_INSN_BIAP_PC_W_R
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, CRISV10F_INSN_BIAP_PC_D_R, CRISV10F_INSN__MAX
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} CRISV10F_INSN_TYPE;
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/* Enum declaration for semantic formats in cpu family crisv10f. */
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typedef enum crisv10f_sfmt_type {
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CRISV10F_SFMT_EMPTY, CRISV10F_SFMT_NOP, CRISV10F_SFMT_MOVE_B_R, CRISV10F_SFMT_MOVE_D_R
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, CRISV10F_SFMT_MOVEPCR, CRISV10F_SFMT_MOVEQ, CRISV10F_SFMT_MOVS_B_R, CRISV10F_SFMT_MOVECBR
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, CRISV10F_SFMT_MOVECWR, CRISV10F_SFMT_MOVECDR, CRISV10F_SFMT_MOVSCBR, CRISV10F_SFMT_MOVSCWR
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, CRISV10F_SFMT_MOVUCBR, CRISV10F_SFMT_MOVUCWR, CRISV10F_SFMT_ADDQ, CRISV10F_SFMT_CMP_R_B_R
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, CRISV10F_SFMT_CMP_M_B_M, CRISV10F_SFMT_CMP_M_W_M, CRISV10F_SFMT_CMP_M_D_M, CRISV10F_SFMT_CMPCBR
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, CRISV10F_SFMT_CMPCWR, CRISV10F_SFMT_CMPCDR, CRISV10F_SFMT_CMPQ, CRISV10F_SFMT_CMPUCBR
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, CRISV10F_SFMT_CMPUCWR, CRISV10F_SFMT_MOVE_M_B_M, CRISV10F_SFMT_MOVE_M_W_M, CRISV10F_SFMT_MOVE_M_D_M
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, CRISV10F_SFMT_MOVS_M_B_M, CRISV10F_SFMT_MOVS_M_W_M, CRISV10F_SFMT_MOVE_R_SPRV10, CRISV10F_SFMT_MOVE_SPR_RV10
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, CRISV10F_SFMT_RET_TYPE, CRISV10F_SFMT_MOVE_M_SPRV10, CRISV10F_SFMT_MOVE_C_SPRV10_P5, CRISV10F_SFMT_MOVE_C_SPRV10_P9
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, CRISV10F_SFMT_MOVE_SPR_MV10, CRISV10F_SFMT_SBFS, CRISV10F_SFMT_MOVEM_R_M, CRISV10F_SFMT_MOVEM_M_R
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, CRISV10F_SFMT_MOVEM_M_PC, CRISV10F_SFMT_ADD_B_R, CRISV10F_SFMT_ADD_D_R, CRISV10F_SFMT_ADD_M_B_M
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, CRISV10F_SFMT_ADD_M_W_M, CRISV10F_SFMT_ADD_M_D_M, CRISV10F_SFMT_ADDCBR, CRISV10F_SFMT_ADDCWR
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, CRISV10F_SFMT_ADDCDR, CRISV10F_SFMT_ADDCPC, CRISV10F_SFMT_ADDS_M_B_M, CRISV10F_SFMT_ADDS_M_W_M
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, CRISV10F_SFMT_ADDSCBR, CRISV10F_SFMT_ADDSCWR, CRISV10F_SFMT_ADDSPCPC, CRISV10F_SFMT_ADDI_B_R
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, CRISV10F_SFMT_NEG_B_R, CRISV10F_SFMT_NEG_D_R, CRISV10F_SFMT_TEST_M_B_M, CRISV10F_SFMT_TEST_M_W_M
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, CRISV10F_SFMT_TEST_M_D_M, CRISV10F_SFMT_MOVE_R_M_B_M, CRISV10F_SFMT_MOVE_R_M_W_M, CRISV10F_SFMT_MOVE_R_M_D_M
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, CRISV10F_SFMT_MULS_B, CRISV10F_SFMT_MSTEP, CRISV10F_SFMT_DSTEP, CRISV10F_SFMT_AND_B_R
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, CRISV10F_SFMT_AND_D_R, CRISV10F_SFMT_AND_M_B_M, CRISV10F_SFMT_AND_M_W_M, CRISV10F_SFMT_AND_M_D_M
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, CRISV10F_SFMT_ANDCBR, CRISV10F_SFMT_ANDCWR, CRISV10F_SFMT_ANDCDR, CRISV10F_SFMT_ANDQ
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, CRISV10F_SFMT_SWAP, CRISV10F_SFMT_ASRQ, CRISV10F_SFMT_LSRR_B_R, CRISV10F_SFMT_LSRR_D_R
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, CRISV10F_SFMT_BTST, CRISV10F_SFMT_BTSTQ, CRISV10F_SFMT_SETF, CRISV10F_SFMT_BCC_B
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, CRISV10F_SFMT_BA_B, CRISV10F_SFMT_BCC_W, CRISV10F_SFMT_BA_W, CRISV10F_SFMT_JUMP_R
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, CRISV10F_SFMT_JUMP_M, CRISV10F_SFMT_JUMP_C, CRISV10F_SFMT_BREAK, CRISV10F_SFMT_BOUND_M_B_M
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, CRISV10F_SFMT_BOUND_M_W_M, CRISV10F_SFMT_BOUND_M_D_M, CRISV10F_SFMT_BOUND_CB, CRISV10F_SFMT_BOUND_CW
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, CRISV10F_SFMT_BOUND_CD, CRISV10F_SFMT_SCC, CRISV10F_SFMT_ADDOQ, CRISV10F_SFMT_BDAPQPC
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, CRISV10F_SFMT_BDAP_32_PC, CRISV10F_SFMT_MOVE_M_PCPLUS_P0, CRISV10F_SFMT_MOVE_M_SPPLUS_P8, CRISV10F_SFMT_ADDO_M_B_M
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, CRISV10F_SFMT_ADDO_M_W_M, CRISV10F_SFMT_ADDO_M_D_M, CRISV10F_SFMT_ADDO_CB, CRISV10F_SFMT_ADDO_CW
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, CRISV10F_SFMT_ADDO_CD, CRISV10F_SFMT_DIP_M, CRISV10F_SFMT_DIP_C, CRISV10F_SFMT_ADDI_ACR_B_R
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, CRISV10F_SFMT_BIAP_PC_B_R
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} CRISV10F_SFMT_TYPE;
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/* Function unit handlers (user written). */
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extern int crisv10f_model_crisv10_u_movem (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rd*/);
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extern int crisv10f_model_crisv10_u_multiply (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
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extern int crisv10f_model_crisv10_u_skip4 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
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extern int crisv10f_model_crisv10_u_stall (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
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extern int crisv10f_model_crisv10_u_const32 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
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extern int crisv10f_model_crisv10_u_const16 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
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extern int crisv10f_model_crisv10_u_mem (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
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extern int crisv10f_model_crisv10_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
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/* Profiling before/after handlers (user written) */
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extern void crisv10f_model_insn_before (SIM_CPU *, int /*first_p*/);
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extern void crisv10f_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
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#endif /* CRISV10F_DECODE_H */
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