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https://sourceware.org/git/binutils-gdb.git
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8e037eae68
Add cskyv2-linux.xml for re-generating cskyv2-linux.c if needed. Also update cskyv2-linux.c.
103 lines
4.0 KiB
XML
103 lines
4.0 KiB
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2022 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.csky.abiv2">
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<reg name="r0" bitsize="32" regnum="0"/>
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<reg name="r1" bitsize="32"/>
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<reg name="r2" bitsize="32"/>
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<reg name="r3" bitsize="32"/>
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<reg name="r4" bitsize="32"/>
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<reg name="r5" bitsize="32"/>
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<reg name="r6" bitsize="32"/>
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<reg name="r7" bitsize="32"/>
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<reg name="r8" bitsize="32"/>
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<reg name="r9" bitsize="32"/>
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<reg name="r10" bitsize="32"/>
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<reg name="r11" bitsize="32"/>
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<reg name="r12" bitsize="32"/>
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<reg name="r13" bitsize="32"/>
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<reg name="r14" bitsize="32" type="data_ptr"/>
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<reg name="r15" bitsize="32"/>
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<reg name="r16" bitsize="32"/>
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<reg name="r17" bitsize="32"/>
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<reg name="r18" bitsize="32"/>
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<reg name="r19" bitsize="32"/>
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<reg name="r20" bitsize="32"/>
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<reg name="r21" bitsize="32"/>
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<reg name="r22" bitsize="32"/>
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<reg name="r23" bitsize="32"/>
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<reg name="r24" bitsize="32"/>
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<reg name="r25" bitsize="32"/>
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<reg name="r26" bitsize="32"/>
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<reg name="r27" bitsize="32"/>
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<reg name="r28" bitsize="32"/>
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<reg name="r29" bitsize="32"/>
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<reg name="r30" bitsize="32"/>
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<reg name="r31" bitsize="32"/>
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<reg name="hi" bitsize="32" regnum="36"/>
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<reg name="lo" bitsize="32"/>
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<reg name="fr0" bitsize="64" type="ieee_double" regnum="40"/>
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<reg name="fr1" bitsize="64" type="ieee_double"/>
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<reg name="fr2" bitsize="64" type="ieee_double"/>
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<reg name="fr3" bitsize="64" type="ieee_double"/>
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<reg name="fr4" bitsize="64" type="ieee_double"/>
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<reg name="fr5" bitsize="64" type="ieee_double"/>
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<reg name="fr6" bitsize="64" type="ieee_double"/>
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<reg name="fr7" bitsize="64" type="ieee_double"/>
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<reg name="fr8" bitsize="64" type="ieee_double"/>
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<reg name="fr9" bitsize="64" type="ieee_double"/>
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<reg name="fr10" bitsize="64" type="ieee_double"/>
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<reg name="fr11" bitsize="64" type="ieee_double"/>
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<reg name="fr12" bitsize="64" type="ieee_double"/>
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<reg name="fr13" bitsize="64" type="ieee_double"/>
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<reg name="fr14" bitsize="64" type="ieee_double"/>
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<reg name="fr15" bitsize="64" type="ieee_double"/>
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<vector id="v4f" type="ieee_single" count="4"/>
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<vector id="v2d" type="ieee_double" count="2"/>
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<vector id="v16i8" type="int8" count="16"/>
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<vector id="v8i16" type="int16" count="8"/>
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<vector id="v4i32" type="int32" count="4"/>
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<vector id="v2i64" type="int64" count="2"/>
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<union id="vec128">
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<field name="v4_float" type="v4f"/>
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<field name="v2_double" type="v2d"/>
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<field name="v16_int8" type="v16i8"/>
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<field name="v8_int16" type="v8i16"/>
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<field name="v4_int32" type="v4i32"/>
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<field name="v2_int64" type="v2i64"/>
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<field name="uint128" type="uint128"/>
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</union>
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<reg name="vr0" bitsize="128" type="vec128" regnum="56"/>
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<reg name="vr1" bitsize="128" type="vec128"/>
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<reg name="vr2" bitsize="128" type="vec128"/>
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<reg name="vr3" bitsize="128" type="vec128"/>
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<reg name="vr4" bitsize="128" type="vec128"/>
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<reg name="vr5" bitsize="128" type="vec128"/>
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<reg name="vr6" bitsize="128" type="vec128"/>
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<reg name="vr7" bitsize="128" type="vec128"/>
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<reg name="vr8" bitsize="128" type="vec128"/>
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<reg name="vr9" bitsize="128" type="vec128"/>
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<reg name="vr10" bitsize="128" type="vec128"/>
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<reg name="vr11" bitsize="128" type="vec128"/>
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<reg name="vr12" bitsize="128" type="vec128"/>
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<reg name="vr13" bitsize="128" type="vec128"/>
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<reg name="vr14" bitsize="128" type="vec128"/>
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<reg name="vr15" bitsize="128" type="vec128"/>
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<reg name="pc" bitsize="32" type="code_ptr" regnum="72"/>
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<reg name="psr" bitsize="32" regnum="89"/>
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<reg name="fid" bitsize="32" regnum="121"/>
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<reg name="fcr" bitsize="32"/>
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<reg name="fesr" bitsize="32"/>
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<reg name="usp" bitsize="32" regnum="127"/>
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</feature>
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