mirror of
https://sourceware.org/git/binutils-gdb.git
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08106042d9
I built GDB for all targets on a x86-64/GNU-Linux system, and then (accidentally) passed GDB a RISC-V binary, and asked GDB to "run" the binary on the native target. I got this error: (gdb) show architecture The target architecture is set to "auto" (currently "i386"). (gdb) file /tmp/hello.rv32.exe Reading symbols from /tmp/hello.rv32.exe... (gdb) show architecture The target architecture is set to "auto" (currently "riscv:rv32"). (gdb) run Starting program: /tmp/hello.rv32.exe ../../src/gdb/i387-tdep.c:596: internal-error: i387_supply_fxsave: Assertion `tdep->st0_regnum >= I386_ST0_REGNUM' failed. What's going on here is this; initially the architecture is i386, this is based on the default architecture, which is set based on the native target. After loading the RISC-V executable the architecture of the current inferior is updated based on the architecture of the executable. When we "run", GDB does a fork & exec, with the inferior being controlled through ptrace. GDB sees an initial stop from the inferior as soon as the inferior comes to life. In response to this stop GDB ends up calling save_stop_reason (linux-nat.c), which ends up trying to read register from the inferior, to do this we end up calling target_ops::fetch_registers, which, for the x86-64 native target, calls amd64_linux_nat_target::fetch_registers. After this I eventually end up in i387_supply_fxsave, different x86 based targets will end in different functions to fetch registers, but it doesn't really matter which function we end up in, the problem is this line, which is repeated in many places: i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch); The problem here is that the ARCH in this line comes from the current inferior, which, as we discussed above, will be a RISC-V gdbarch, the tdep field will actually be of type riscv_gdbarch_tdep, not i386_gdbarch_tdep. After this cast we are relying on undefined behaviour, in my case I happen to trigger an assert, but this might not always be the case. The thing I tried that exposed this problem was of course, trying to start an executable of the wrong architecture on a native target. I don't think that the correct solution for this problem is to detect, at the point of cast, that the gdbarch_tdep object is of the wrong type, but, I did wonder, is there a way that we could protect ourselves from incorrectly casting the gdbarch_tdep object? I think that there is something we can do here, and this commit is the first step in that direction, though no actual check is added by this commit. This commit can be split into two parts: (1) In gdbarch.h and arch-utils.c. In these files I have modified gdbarch_tdep (the function) so that it now takes a template argument, like this: template<typename TDepType> static inline TDepType * gdbarch_tdep (struct gdbarch *gdbarch) { struct gdbarch_tdep *tdep = gdbarch_tdep_1 (gdbarch); return static_cast<TDepType *> (tdep); } After this change we are no better protected, but the cast is now done within the gdbarch_tdep function rather than at the call sites, this leads to the second, much larger change in this commit, (2) Everywhere gdbarch_tdep is called, we make changes like this: - i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch); + i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch); There should be no functional change after this commit. In the next commit I will build on this change to add an assertion in gdbarch_tdep that checks we are casting to the correct type.
386 lines
10 KiB
C
386 lines
10 KiB
C
/* Native-dependent code for FreeBSD/aarch64.
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Copyright (C) 2017-2022 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "arch-utils.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include "nat/aarch64-hw-point.h"
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#include "elf/common.h"
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#include <sys/param.h>
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#include <sys/ptrace.h>
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#include <machine/armreg.h>
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#include <machine/reg.h>
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#include "fbsd-nat.h"
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#include "aarch64-tdep.h"
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#include "aarch64-fbsd-tdep.h"
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#include "aarch64-nat.h"
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#include "inf-ptrace.h"
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#if __FreeBSD_version >= 1400005
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#define HAVE_DBREG
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#include <unordered_set>
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#endif
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#ifdef HAVE_DBREG
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struct aarch64_fbsd_nat_target final
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: public aarch64_nat_target<fbsd_nat_target>
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#else
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struct aarch64_fbsd_nat_target final : public fbsd_nat_target
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#endif
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{
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void fetch_registers (struct regcache *, int) override;
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void store_registers (struct regcache *, int) override;
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const struct target_desc *read_description () override;
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#ifdef HAVE_DBREG
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/* Hardware breakpoints and watchpoints. */
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bool stopped_by_watchpoint () override;
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bool stopped_data_address (CORE_ADDR *) override;
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bool stopped_by_hw_breakpoint () override;
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bool supports_stopped_by_hw_breakpoint () override;
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void post_startup_inferior (ptid_t) override;
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void post_attach (int pid) override;
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void low_new_fork (ptid_t parent, pid_t child) override;
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void low_delete_thread (thread_info *) override;
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void low_prepare_to_resume (thread_info *) override;
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private:
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void probe_debug_regs (int pid);
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static bool debug_regs_probed;
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#endif
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};
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static aarch64_fbsd_nat_target the_aarch64_fbsd_nat_target;
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/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
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for all registers. */
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void
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aarch64_fbsd_nat_target::fetch_registers (struct regcache *regcache,
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int regnum)
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{
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fetch_register_set<struct reg> (regcache, regnum, PT_GETREGS,
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&aarch64_fbsd_gregset);
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fetch_register_set<struct fpreg> (regcache, regnum, PT_GETFPREGS,
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&aarch64_fbsd_fpregset);
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gdbarch *gdbarch = regcache->arch ();
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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if (tdep->has_tls ())
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{
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const struct regcache_map_entry aarch64_fbsd_tls_regmap[] =
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{
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{ 1, tdep->tls_regnum, 8 },
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{ 0 }
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};
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const struct regset aarch64_fbsd_tls_regset =
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{
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aarch64_fbsd_tls_regmap,
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regcache_supply_regset, regcache_collect_regset
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};
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fetch_regset<uint64_t> (regcache, regnum, NT_ARM_TLS,
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&aarch64_fbsd_tls_regset);
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}
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}
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/* Store register REGNUM back into the inferior. If REGNUM is -1, do
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this for all registers. */
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void
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aarch64_fbsd_nat_target::store_registers (struct regcache *regcache,
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int regnum)
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{
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store_register_set<struct reg> (regcache, regnum, PT_GETREGS, PT_SETREGS,
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&aarch64_fbsd_gregset);
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store_register_set<struct fpreg> (regcache, regnum, PT_GETFPREGS,
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PT_SETFPREGS, &aarch64_fbsd_fpregset);
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gdbarch *gdbarch = regcache->arch ();
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aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
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if (tdep->has_tls ())
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{
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const struct regcache_map_entry aarch64_fbsd_tls_regmap[] =
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{
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{ 1, tdep->tls_regnum, 8 },
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{ 0 }
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};
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const struct regset aarch64_fbsd_tls_regset =
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{
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aarch64_fbsd_tls_regmap,
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regcache_supply_regset, regcache_collect_regset
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};
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store_regset<uint64_t> (regcache, regnum, NT_ARM_TLS,
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&aarch64_fbsd_tls_regset);
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}
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}
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/* Implement the target read_description method. */
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const struct target_desc *
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aarch64_fbsd_nat_target::read_description ()
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{
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aarch64_features features;
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features.tls = have_regset (inferior_ptid, NT_ARM_TLS) != 0;
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return aarch64_read_description (features);
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}
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#ifdef HAVE_DBREG
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bool aarch64_fbsd_nat_target::debug_regs_probed;
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/* Set of threads which need to update debug registers on next resume. */
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static std::unordered_set<lwpid_t> aarch64_debug_pending_threads;
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/* Implement the "stopped_data_address" target_ops method. */
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bool
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aarch64_fbsd_nat_target::stopped_data_address (CORE_ADDR *addr_p)
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{
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siginfo_t siginfo;
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struct aarch64_debug_reg_state *state;
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if (!fbsd_nat_get_siginfo (inferior_ptid, &siginfo))
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return false;
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/* This must be a hardware breakpoint. */
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if (siginfo.si_signo != SIGTRAP
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|| siginfo.si_code != TRAP_TRACE
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|| siginfo.si_trapno != EXCP_WATCHPT_EL0)
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return false;
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const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
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/* Check if the address matches any watched address. */
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state = aarch64_get_debug_reg_state (inferior_ptid.pid ());
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return aarch64_stopped_data_address (state, addr_trap, addr_p);
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}
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/* Implement the "stopped_by_watchpoint" target_ops method. */
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bool
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aarch64_fbsd_nat_target::stopped_by_watchpoint ()
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{
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CORE_ADDR addr;
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return stopped_data_address (&addr);
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}
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/* Implement the "stopped_by_hw_breakpoint" target_ops method. */
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bool
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aarch64_fbsd_nat_target::stopped_by_hw_breakpoint ()
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{
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siginfo_t siginfo;
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struct aarch64_debug_reg_state *state;
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if (!fbsd_nat_get_siginfo (inferior_ptid, &siginfo))
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return false;
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/* This must be a hardware breakpoint. */
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if (siginfo.si_signo != SIGTRAP
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|| siginfo.si_code != TRAP_TRACE
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|| siginfo.si_trapno != EXCP_WATCHPT_EL0)
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return false;
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return !stopped_by_watchpoint();
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}
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/* Implement the "supports_stopped_by_hw_breakpoint" target_ops method. */
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bool
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aarch64_fbsd_nat_target::supports_stopped_by_hw_breakpoint ()
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{
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return true;
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}
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/* Fetch the hardware debug register capability information. */
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void
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aarch64_fbsd_nat_target::probe_debug_regs (int pid)
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{
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if (!debug_regs_probed)
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{
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struct dbreg reg;
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debug_regs_probed = true;
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aarch64_num_bp_regs = 0;
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aarch64_num_wp_regs = 0;
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if (ptrace(PT_GETDBREGS, pid, (PTRACE_TYPE_ARG3) ®, 0) == 0)
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{
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switch (reg.db_debug_ver)
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{
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case AARCH64_DEBUG_ARCH_V8:
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case AARCH64_DEBUG_ARCH_V8_1:
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case AARCH64_DEBUG_ARCH_V8_2:
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case AARCH64_DEBUG_ARCH_V8_4:
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break;
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default:
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return;
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}
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aarch64_num_bp_regs = reg.db_nbkpts;
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if (aarch64_num_bp_regs > AARCH64_HBP_MAX_NUM)
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{
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warning (_("Unexpected number of hardware breakpoint registers"
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" reported by ptrace, got %d, expected %d."),
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aarch64_num_bp_regs, AARCH64_HBP_MAX_NUM);
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aarch64_num_bp_regs = AARCH64_HBP_MAX_NUM;
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}
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aarch64_num_wp_regs = reg.db_nwtpts;
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if (aarch64_num_wp_regs > AARCH64_HWP_MAX_NUM)
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{
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warning (_("Unexpected number of hardware watchpoint registers"
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" reported by ptrace, got %d, expected %d."),
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aarch64_num_wp_regs, AARCH64_HWP_MAX_NUM);
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aarch64_num_wp_regs = AARCH64_HWP_MAX_NUM;
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}
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}
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}
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}
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/* Implement the virtual inf_ptrace_target::post_startup_inferior method. */
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void
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aarch64_fbsd_nat_target::post_startup_inferior (ptid_t ptid)
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{
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aarch64_remove_debug_reg_state (ptid.pid ());
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probe_debug_regs (ptid.pid ());
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fbsd_nat_target::post_startup_inferior (ptid);
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}
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/* Implement the "post_attach" target_ops method. */
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void
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aarch64_fbsd_nat_target::post_attach (int pid)
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{
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aarch64_remove_debug_reg_state (pid);
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probe_debug_regs (pid);
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fbsd_nat_target::post_attach (pid);
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}
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/* Implement the virtual fbsd_nat_target::low_new_fork method. */
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void
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aarch64_fbsd_nat_target::low_new_fork (ptid_t parent, pid_t child)
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{
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struct aarch64_debug_reg_state *parent_state, *child_state;
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/* If there is no parent state, no watchpoints nor breakpoints have
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been set, so there is nothing to do. */
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parent_state = aarch64_lookup_debug_reg_state (parent.pid ());
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if (parent_state == nullptr)
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return;
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/* The kernel clears debug registers in the new child process after
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fork, but GDB core assumes the child inherits the watchpoints/hw
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breakpoints of the parent, and will remove them all from the
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forked off process. Copy the debug registers mirrors into the
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new process so that all breakpoints and watchpoints can be
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removed together. */
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child_state = aarch64_get_debug_reg_state (child);
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*child_state = *parent_state;
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}
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/* Mark debug register state "dirty" for all threads belonging to the
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current inferior. */
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void
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aarch64_notify_debug_reg_change (ptid_t ptid,
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int is_watchpoint, unsigned int idx)
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{
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for (thread_info *tp : current_inferior ()->non_exited_threads ())
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{
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if (tp->ptid.lwp_p ())
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aarch64_debug_pending_threads.emplace (tp->ptid.lwp ());
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}
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}
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/* Implement the virtual fbsd_nat_target::low_delete_thread method. */
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void
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aarch64_fbsd_nat_target::low_delete_thread (thread_info *tp)
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{
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gdb_assert(tp->ptid.lwp_p ());
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aarch64_debug_pending_threads.erase (tp->ptid.lwp ());
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}
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/* Implement the virtual fbsd_nat_target::low_prepare_to_resume method. */
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void
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aarch64_fbsd_nat_target::low_prepare_to_resume (thread_info *tp)
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{
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gdb_assert(tp->ptid.lwp_p ());
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if (aarch64_debug_pending_threads.erase (tp->ptid.lwp ()) == 0)
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return;
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struct aarch64_debug_reg_state *state =
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aarch64_lookup_debug_reg_state (tp->ptid.pid ());
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gdb_assert(state != nullptr);
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struct dbreg reg;
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memset (®, 0, sizeof(reg));
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for (int i = 0; i < aarch64_num_bp_regs; i++)
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{
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reg.db_breakregs[i].dbr_addr = state->dr_addr_bp[i];
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reg.db_breakregs[i].dbr_ctrl = state->dr_ctrl_bp[i];
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}
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for (int i = 0; i < aarch64_num_wp_regs; i++)
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{
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reg.db_watchregs[i].dbw_addr = state->dr_addr_wp[i];
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reg.db_watchregs[i].dbw_ctrl = state->dr_ctrl_wp[i];
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}
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if (ptrace(PT_SETDBREGS, tp->ptid.lwp (), (PTRACE_TYPE_ARG3) ®, 0) != 0)
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error (_("Failed to set hardware debug registers"));
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}
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#else
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/* A stub that should never be called. */
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void
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aarch64_notify_debug_reg_change (ptid_t ptid,
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int is_watchpoint, unsigned int idx)
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{
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gdb_assert (true);
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}
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#endif
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void _initialize_aarch64_fbsd_nat ();
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void
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_initialize_aarch64_fbsd_nat ()
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{
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#ifdef HAVE_DBREG
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aarch64_initialize_hw_point ();
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#endif
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add_inf_child_target (&the_aarch64_fbsd_nat_target);
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}
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