Ambrogino Modigliani 15a086bed7 Fix spelling in comments in Assembler files (ld) ... * testsuite/ld-arm/stm32l4xx-fix-all.s: Fix spelling in comments. * testsuite/ld-arm/thumb2-b-interwork.s: Fix spelling in comments. * testsuite/ld-arm/thumb2-bl.s: Fix spelling in comments. * testsuite/ld-s390/tlspic1.s: Fix spelling in comments. * testsuite/ld-s390/tlspic1_64.s: Fix spelling in comments. * testsuite/ld-scripts/section-match-1.d: Fix spelling in comments.		2016-11-27 15:07:26 +10:30
..
gotreloc_31-1.dd
gotreloc_64-1.dd
gotreloc-1.s
gotreloc-1.ver
pltoffset-1.dd
pltoffset-1.ld
pltoffset-1.s
s390.exp
tlsbin_64.dd	Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT.	2016-10-11 13:50:10 +01:00
tlsbin_64.rd	S/390: Move binary start to 16M.	2016-10-10 17:09:03 +02:00
tlsbin_64.s
tlsbin_64.sd
tlsbin_64.td
tlsbin.dd
tlsbin.rd
tlsbin.s
tlsbin.sd
tlsbin.td
tlsbinpic_64.s
tlsbinpic.s
tlslib_64.s
tlslib.s
tlspic1_64.s	Fix spelling in comments in Assembler files (ld)	2016-11-27 15:07:26 +10:30
tlspic1.s	Fix spelling in comments in Assembler files (ld)	2016-11-27 15:07:26 +10:30
tlspic2_64.s
tlspic2.s
tlspic_64.dd	Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT.	2016-10-11 13:50:10 +01:00
tlspic_64.rd
tlspic_64.sd
tlspic_64.td
tlspic.dd
tlspic.rd
tlspic.sd
tlspic.td