mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-15 04:31:49 +08:00
3e8c34ea9d
To suit f7d69005.
* testsuite/ld-powerpc/vle-multiseg-1.d: Adjust to suit segment change.
* testsuite/ld-powerpc/vle-multiseg-2.d: Likewise.
* testsuite/ld-powerpc/vle-multiseg-3.d: Likewise.
* testsuite/ld-powerpc/vle-multiseg-6.d: Likewise.
* testsuite/ld-powerpc/vle-reloc-2.d: Likewise.
88 lines
2.6 KiB
Makefile
88 lines
2.6 KiB
Makefile
.*: file format .*
|
|
|
|
Disassembly of section .text:
|
|
|
|
.* <sub1>:
|
|
.*: 00 04 se_blr
|
|
.* <sub2>:
|
|
.*: 00 04 se_blr
|
|
.* <vle_reloc_2>:
|
|
.*: 70 20 c1 a2 e_or2i r1,418
|
|
.*: 70 40 c1 81 e_or2i r2,385
|
|
.*: 70 60 c1 81 e_or2i r3,385
|
|
.*: 70 80 c1 ae e_or2i r4,430
|
|
.*: 70 a0 c1 80 e_or2i r5,384
|
|
.*: 70 40 c1 81 e_or2i r2,385
|
|
.*: 70 20 c9 a2 e_and2i\. r1,418
|
|
.*: 70 40 c9 81 e_and2i\. r2,385
|
|
.*: 70 60 c9 81 e_and2i\. r3,385
|
|
.*: 70 80 c9 ae e_and2i\. r4,430
|
|
.*: 70 a0 c9 80 e_and2i\. r5,384
|
|
.*: 70 40 c9 81 e_and2i\. r2,385
|
|
.*: 70 20 d1 a2 e_or2is r1,418
|
|
.*: 70 40 d1 81 e_or2is r2,385
|
|
.*: 70 60 d1 81 e_or2is r3,385
|
|
.*: 70 80 d1 ae e_or2is r4,430
|
|
.*: 70 a0 d1 80 e_or2is r5,384
|
|
.*: 70 40 d1 81 e_or2is r2,385
|
|
.*: 70 20 e1 a2 e_lis r1,418
|
|
.*: 70 40 e1 81 e_lis r2,385
|
|
.*: 70 60 e1 81 e_lis r3,385
|
|
.*: 70 80 e1 ae e_lis r4,430
|
|
.*: 70 a0 e1 80 e_lis r5,384
|
|
.*: 70 40 e1 81 e_lis r2,385
|
|
.*: 70 20 e9 a2 e_and2is\. r1,418
|
|
.*: 70 40 e9 81 e_and2is\. r2,385
|
|
.*: 70 60 e9 81 e_and2is\. r3,385
|
|
.*: 70 80 e9 ae e_and2is\. r4,430
|
|
.*: 70 a0 e9 80 e_and2is\. r5,384
|
|
.*: 70 40 e9 81 e_and2is\. r2,385
|
|
.*: 70 01 99 a2 e_cmp16i r1,418
|
|
.*: 70 02 99 81 e_cmp16i r2,385
|
|
.*: 70 03 99 81 e_cmp16i r3,385
|
|
.*: 70 04 99 ae e_cmp16i r4,430
|
|
.*: 70 05 99 80 e_cmp16i r5,384
|
|
.*: 70 02 99 81 e_cmp16i r2,385
|
|
.*: 70 01 a9 a2 e_cmpl16i r1,418
|
|
.*: 70 02 a9 81 e_cmpl16i r2,385
|
|
.*: 70 03 a9 81 e_cmpl16i r3,385
|
|
.*: 70 04 a9 ae e_cmpl16i r4,430
|
|
.*: 70 05 a9 80 e_cmpl16i r5,384
|
|
.*: 70 02 a9 81 e_cmpl16i r2,385
|
|
.*: 70 01 b1 a2 e_cmph16i r1,418
|
|
.*: 70 02 b1 81 e_cmph16i r2,385
|
|
.*: 70 03 b1 81 e_cmph16i r3,385
|
|
.*: 70 04 b1 ae e_cmph16i r4,430
|
|
.*: 70 05 b1 80 e_cmph16i r5,384
|
|
.*: 70 02 b1 81 e_cmph16i r2,385
|
|
.*: 70 01 b9 a2 e_cmphl16i r1,418
|
|
.*: 70 02 b9 81 e_cmphl16i r2,385
|
|
.*: 70 03 b9 81 e_cmphl16i r3,385
|
|
.*: 70 04 b9 ae e_cmphl16i r4,430
|
|
.*: 70 05 b9 80 e_cmphl16i r5,384
|
|
.*: 70 02 b9 81 e_cmphl16i r2,385
|
|
.*: 70 01 89 a2 e_add2i\. r1,418
|
|
.*: 70 02 89 81 e_add2i\. r2,385
|
|
.*: 70 03 89 81 e_add2i\. r3,385
|
|
.*: 70 04 89 ae e_add2i\. r4,430
|
|
.*: 70 05 89 80 e_add2i\. r5,384
|
|
.*: 70 02 89 81 e_add2i\. r2,385
|
|
.*: 70 01 91 a2 e_add2is r1,418
|
|
.*: 70 02 91 81 e_add2is r2,385
|
|
.*: 70 03 91 81 e_add2is r3,385
|
|
.*: 70 04 91 ae e_add2is r4,430
|
|
.*: 70 05 91 80 e_add2is r5,384
|
|
.*: 70 02 91 81 e_add2is r2,385
|
|
.*: 70 01 a1 a2 e_mull2i r1,418
|
|
.*: 70 02 a1 81 e_mull2i r2,385
|
|
.*: 70 03 a1 81 e_mull2i r3,385
|
|
.*: 70 04 a1 ae e_mull2i r4,430
|
|
.*: 70 05 a1 80 e_mull2i r5,384
|
|
.*: 70 02 a1 81 e_mull2i r2,385
|
|
.* <sub3>:
|
|
.*: 00 04 se_blr
|
|
.* <sub4>:
|
|
.*: 00 04 se_blr
|
|
.* <sub5>:
|
|
.*: 00 04 se_blr
|