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c0890d2628
This patch adds the SVE instruction definitions and associated OP_* enum values. include/ * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro. (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi) (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P) (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops. opcodes/ * aarch64-tbl.h (OP_SVE_B, OP_SVE_BB, OP_SVE_BBBU, OP_SVE_BMB) (OP_SVE_BPB, OP_SVE_BUB, OP_SVE_BUBB, OP_SVE_BUU, OP_SVE_BZ) (OP_SVE_BZB, OP_SVE_BZBB, OP_SVE_BZU, OP_SVE_DD, OP_SVE_DDD) (OP_SVE_DMD, OP_SVE_DMH, OP_SVE_DMS, OP_SVE_DU, OP_SVE_DUD, OP_SVE_DUU) (OP_SVE_DUV_BHS, OP_SVE_DUV_BHSD, OP_SVE_DZD, OP_SVE_DZU, OP_SVE_HB) (OP_SVE_HMD, OP_SVE_HMS, OP_SVE_HU, OP_SVE_HUU, OP_SVE_HZU, OP_SVE_RR) (OP_SVE_RURV_BHSD, OP_SVE_RUV_BHSD, OP_SVE_SMD, OP_SVE_SMH, OP_SVE_SMS) (OP_SVE_SU, OP_SVE_SUS, OP_SVE_SUU, OP_SVE_SZS, OP_SVE_SZU, OP_SVE_UB) (OP_SVE_UUD, OP_SVE_UUS, OP_SVE_VMR_BHSD, OP_SVE_VMU_SD) (OP_SVE_VMVD_BHS, OP_SVE_VMVU_BHSD, OP_SVE_VMVU_SD, OP_SVE_VMVV_BHSD) (OP_SVE_VMVV_SD, OP_SVE_VMV_BHSD, OP_SVE_VMV_HSD, OP_SVE_VMV_SD) (OP_SVE_VM_SD, OP_SVE_VPU_BHSD, OP_SVE_VPV_BHSD, OP_SVE_VRR_BHSD) (OP_SVE_VRU_BHSD, OP_SVE_VR_BHSD, OP_SVE_VUR_BHSD, OP_SVE_VUU_BHSD) (OP_SVE_VUVV_BHSD, OP_SVE_VUVV_SD, OP_SVE_VUV_BHSD, OP_SVE_VUV_SD) (OP_SVE_VU_BHSD, OP_SVE_VU_HSD, OP_SVE_VU_SD, OP_SVE_VVD_BHS) (OP_SVE_VVU_BHSD, OP_SVE_VVVU_SD, OP_SVE_VVV_BHSD, OP_SVE_VVV_SD) (OP_SVE_VV_BHSD, OP_SVE_VV_HSD_BHS, OP_SVE_VV_SD, OP_SVE_VWW_BHSD) (OP_SVE_VXX_BHSD, OP_SVE_VZVD_BHS, OP_SVE_VZVU_BHSD, OP_SVE_VZVV_BHSD) (OP_SVE_VZVV_SD, OP_SVE_VZV_SD, OP_SVE_V_SD, OP_SVE_WU, OP_SVE_WV_BHSD) (OP_SVE_XU, OP_SVE_XUV_BHSD, OP_SVE_XVW_BHSD, OP_SVE_XV_BHSD) (OP_SVE_XWU, OP_SVE_XXU): New macros. (aarch64_feature_sve): New variable. (SVE): New macro. (_SVE_INSN): Likewise. (aarch64_opcode_table): Add SVE instructions. * aarch64-opc.h (extract_fields): Declare. * aarch64-opc-2.c: Regenerate. * aarch64-asm.c (do_misc_encoding): Handle the new SVE aarch64_ops. * aarch64-asm-2.c: Regenerate. * aarch64-dis.c (extract_fields): Make global. (do_misc_decoding): Handle the new SVE aarch64_ops. * aarch64-dis-2.c: Regenerate. gas/ * doc/c-aarch64.texi: Document the "sve" feature. * config/tc-aarch64.c (REG_TYPE_R_Z_BHSDQ_VZP): New register type. (get_reg_expected_msg): Handle it. (parse_operands): When parsing operands of an SVE instruction, disallow immediates that match REG_TYPE_R_Z_BHSDQ_VZP. (aarch64_features): Add an entry for SVE.
799 lines
20 KiB
C
799 lines
20 KiB
C
/* This file is automatically generated by aarch64-gen. Do not edit! */
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/* Copyright (C) 2012-2016 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#include "sysdep.h"
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#include "aarch64-asm.h"
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const aarch64_opcode *
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aarch64_find_real_opcode (const aarch64_opcode *opcode)
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{
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/* Use the index as the key to locate the real opcode. */
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int key = opcode - aarch64_opcode_table;
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int value;
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switch (key)
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{
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case 3: /* ngc */
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case 2: /* sbc */
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value = 2; /* --> sbc. */
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break;
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case 5: /* ngcs */
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case 4: /* sbcs */
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value = 4; /* --> sbcs. */
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break;
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case 8: /* cmn */
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case 7: /* adds */
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value = 7; /* --> adds. */
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break;
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case 11: /* cmp */
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case 10: /* subs */
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value = 10; /* --> subs. */
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break;
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case 13: /* mov */
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case 12: /* add */
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value = 12; /* --> add. */
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break;
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case 15: /* cmn */
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case 14: /* adds */
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value = 14; /* --> adds. */
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break;
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case 18: /* cmp */
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case 17: /* subs */
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value = 17; /* --> subs. */
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break;
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case 21: /* cmn */
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case 20: /* adds */
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value = 20; /* --> adds. */
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break;
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case 23: /* neg */
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case 22: /* sub */
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value = 22; /* --> sub. */
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break;
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case 26: /* negs */
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case 25: /* cmp */
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case 24: /* subs */
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value = 24; /* --> subs. */
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break;
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case 150: /* mov */
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case 149: /* umov */
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value = 149; /* --> umov. */
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break;
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case 152: /* mov */
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case 151: /* ins */
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value = 151; /* --> ins. */
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break;
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case 154: /* mov */
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case 153: /* ins */
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value = 153; /* --> ins. */
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break;
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case 236: /* mvn */
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case 235: /* not */
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value = 235; /* --> not. */
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break;
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case 311: /* mov */
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case 310: /* orr */
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value = 310; /* --> orr. */
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break;
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case 380: /* sxtl */
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case 379: /* sshll */
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value = 379; /* --> sshll. */
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break;
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case 382: /* sxtl2 */
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case 381: /* sshll2 */
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value = 381; /* --> sshll2. */
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break;
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case 404: /* uxtl */
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case 403: /* ushll */
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value = 403; /* --> ushll. */
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break;
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case 406: /* uxtl2 */
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case 405: /* ushll2 */
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value = 405; /* --> ushll2. */
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break;
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case 527: /* mov */
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case 526: /* dup */
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value = 526; /* --> dup. */
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break;
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case 614: /* sxtw */
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case 613: /* sxth */
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case 612: /* sxtb */
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case 615: /* asr */
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case 611: /* sbfx */
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case 610: /* sbfiz */
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case 609: /* sbfm */
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value = 609; /* --> sbfm. */
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break;
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case 618: /* bfc */
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case 619: /* bfxil */
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case 617: /* bfi */
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case 616: /* bfm */
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value = 616; /* --> bfm. */
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break;
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case 624: /* uxth */
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case 623: /* uxtb */
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case 626: /* lsr */
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case 625: /* lsl */
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case 622: /* ubfx */
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case 621: /* ubfiz */
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case 620: /* ubfm */
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value = 620; /* --> ubfm. */
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break;
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case 644: /* cset */
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case 643: /* cinc */
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case 642: /* csinc */
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value = 642; /* --> csinc. */
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break;
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case 647: /* csetm */
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case 646: /* cinv */
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case 645: /* csinv */
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value = 645; /* --> csinv. */
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break;
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case 649: /* cneg */
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case 648: /* csneg */
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value = 648; /* --> csneg. */
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break;
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case 667: /* rev */
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case 668: /* rev64 */
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value = 667; /* --> rev. */
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break;
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case 675: /* lsl */
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case 674: /* lslv */
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value = 674; /* --> lslv. */
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break;
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case 677: /* lsr */
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case 676: /* lsrv */
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value = 676; /* --> lsrv. */
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break;
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case 679: /* asr */
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case 678: /* asrv */
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value = 678; /* --> asrv. */
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break;
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case 681: /* ror */
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case 680: /* rorv */
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value = 680; /* --> rorv. */
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break;
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case 691: /* mul */
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case 690: /* madd */
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value = 690; /* --> madd. */
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break;
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case 693: /* mneg */
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case 692: /* msub */
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value = 692; /* --> msub. */
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break;
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case 695: /* smull */
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case 694: /* smaddl */
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value = 694; /* --> smaddl. */
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break;
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case 697: /* smnegl */
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case 696: /* smsubl */
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value = 696; /* --> smsubl. */
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break;
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case 700: /* umull */
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case 699: /* umaddl */
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value = 699; /* --> umaddl. */
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break;
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case 702: /* umnegl */
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case 701: /* umsubl */
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value = 701; /* --> umsubl. */
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break;
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case 713: /* ror */
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case 712: /* extr */
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value = 712; /* --> extr. */
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break;
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case 920: /* bic */
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case 919: /* and */
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value = 919; /* --> and. */
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break;
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case 922: /* mov */
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case 921: /* orr */
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value = 921; /* --> orr. */
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break;
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case 925: /* tst */
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case 924: /* ands */
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value = 924; /* --> ands. */
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break;
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case 930: /* uxtw */
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case 929: /* mov */
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case 928: /* orr */
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value = 928; /* --> orr. */
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break;
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case 932: /* mvn */
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case 931: /* orn */
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value = 931; /* --> orn. */
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break;
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case 936: /* tst */
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case 935: /* ands */
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value = 935; /* --> ands. */
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break;
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case 1062: /* staddb */
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case 966: /* ldaddb */
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value = 966; /* --> ldaddb. */
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break;
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case 1063: /* staddh */
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case 967: /* ldaddh */
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value = 967; /* --> ldaddh. */
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break;
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case 1064: /* stadd */
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case 968: /* ldadd */
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value = 968; /* --> ldadd. */
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break;
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case 1065: /* staddlb */
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case 970: /* ldaddlb */
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value = 970; /* --> ldaddlb. */
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break;
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case 1066: /* staddlh */
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case 973: /* ldaddlh */
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value = 973; /* --> ldaddlh. */
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break;
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case 1067: /* staddl */
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case 976: /* ldaddl */
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value = 976; /* --> ldaddl. */
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break;
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case 1068: /* stclrb */
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case 978: /* ldclrb */
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value = 978; /* --> ldclrb. */
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break;
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case 1069: /* stclrh */
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case 979: /* ldclrh */
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value = 979; /* --> ldclrh. */
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break;
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case 1070: /* stclr */
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case 980: /* ldclr */
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value = 980; /* --> ldclr. */
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break;
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case 1071: /* stclrlb */
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case 982: /* ldclrlb */
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value = 982; /* --> ldclrlb. */
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break;
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case 1072: /* stclrlh */
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case 985: /* ldclrlh */
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value = 985; /* --> ldclrlh. */
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break;
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case 1073: /* stclrl */
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case 988: /* ldclrl */
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value = 988; /* --> ldclrl. */
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break;
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case 1074: /* steorb */
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case 990: /* ldeorb */
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value = 990; /* --> ldeorb. */
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break;
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case 1075: /* steorh */
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case 991: /* ldeorh */
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value = 991; /* --> ldeorh. */
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break;
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case 1076: /* steor */
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case 992: /* ldeor */
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value = 992; /* --> ldeor. */
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break;
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case 1077: /* steorlb */
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case 994: /* ldeorlb */
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value = 994; /* --> ldeorlb. */
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break;
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case 1078: /* steorlh */
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case 997: /* ldeorlh */
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value = 997; /* --> ldeorlh. */
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break;
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case 1079: /* steorl */
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case 1000: /* ldeorl */
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value = 1000; /* --> ldeorl. */
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break;
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case 1080: /* stsetb */
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case 1002: /* ldsetb */
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value = 1002; /* --> ldsetb. */
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break;
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case 1081: /* stseth */
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case 1003: /* ldseth */
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value = 1003; /* --> ldseth. */
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break;
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case 1082: /* stset */
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case 1004: /* ldset */
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value = 1004; /* --> ldset. */
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break;
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case 1083: /* stsetlb */
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case 1006: /* ldsetlb */
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value = 1006; /* --> ldsetlb. */
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break;
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case 1084: /* stsetlh */
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case 1009: /* ldsetlh */
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value = 1009; /* --> ldsetlh. */
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break;
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case 1085: /* stsetl */
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case 1012: /* ldsetl */
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value = 1012; /* --> ldsetl. */
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break;
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case 1086: /* stsmaxb */
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case 1014: /* ldsmaxb */
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value = 1014; /* --> ldsmaxb. */
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break;
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case 1087: /* stsmaxh */
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case 1015: /* ldsmaxh */
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value = 1015; /* --> ldsmaxh. */
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break;
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case 1088: /* stsmax */
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case 1016: /* ldsmax */
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value = 1016; /* --> ldsmax. */
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break;
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case 1089: /* stsmaxlb */
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case 1018: /* ldsmaxlb */
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value = 1018; /* --> ldsmaxlb. */
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break;
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case 1090: /* stsmaxlh */
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case 1021: /* ldsmaxlh */
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value = 1021; /* --> ldsmaxlh. */
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break;
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case 1091: /* stsmaxl */
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case 1024: /* ldsmaxl */
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value = 1024; /* --> ldsmaxl. */
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break;
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case 1092: /* stsminb */
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case 1026: /* ldsminb */
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value = 1026; /* --> ldsminb. */
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break;
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case 1093: /* stsminh */
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case 1027: /* ldsminh */
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value = 1027; /* --> ldsminh. */
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break;
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case 1094: /* stsmin */
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case 1028: /* ldsmin */
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value = 1028; /* --> ldsmin. */
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break;
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case 1095: /* stsminlb */
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case 1030: /* ldsminlb */
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value = 1030; /* --> ldsminlb. */
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break;
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case 1096: /* stsminlh */
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case 1033: /* ldsminlh */
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value = 1033; /* --> ldsminlh. */
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break;
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case 1097: /* stsminl */
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case 1036: /* ldsminl */
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value = 1036; /* --> ldsminl. */
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break;
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case 1098: /* stumaxb */
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case 1038: /* ldumaxb */
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value = 1038; /* --> ldumaxb. */
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break;
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case 1099: /* stumaxh */
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case 1039: /* ldumaxh */
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value = 1039; /* --> ldumaxh. */
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break;
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case 1100: /* stumax */
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case 1040: /* ldumax */
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value = 1040; /* --> ldumax. */
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break;
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case 1101: /* stumaxlb */
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case 1042: /* ldumaxlb */
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value = 1042; /* --> ldumaxlb. */
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break;
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case 1102: /* stumaxlh */
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case 1045: /* ldumaxlh */
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value = 1045; /* --> ldumaxlh. */
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break;
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case 1103: /* stumaxl */
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case 1048: /* ldumaxl */
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value = 1048; /* --> ldumaxl. */
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break;
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case 1104: /* stuminb */
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case 1050: /* lduminb */
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value = 1050; /* --> lduminb. */
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break;
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case 1105: /* stuminh */
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case 1051: /* lduminh */
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value = 1051; /* --> lduminh. */
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break;
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case 1106: /* stumin */
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case 1052: /* ldumin */
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value = 1052; /* --> ldumin. */
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break;
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case 1107: /* stuminlb */
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case 1054: /* lduminlb */
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value = 1054; /* --> lduminlb. */
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break;
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case 1108: /* stuminlh */
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case 1057: /* lduminlh */
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value = 1057; /* --> lduminlh. */
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break;
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case 1109: /* stuminl */
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case 1060: /* lduminl */
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value = 1060; /* --> lduminl. */
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break;
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case 1111: /* mov */
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case 1110: /* movn */
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value = 1110; /* --> movn. */
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break;
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case 1113: /* mov */
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case 1112: /* movz */
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value = 1112; /* --> movz. */
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break;
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case 1126: /* psb */
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case 1125: /* esb */
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case 1124: /* sevl */
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case 1123: /* sev */
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case 1122: /* wfi */
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case 1121: /* wfe */
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case 1120: /* yield */
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case 1119: /* nop */
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case 1118: /* hint */
|
|
value = 1118; /* --> hint. */
|
|
break;
|
|
case 1135: /* tlbi */
|
|
case 1134: /* ic */
|
|
case 1133: /* dc */
|
|
case 1132: /* at */
|
|
case 1131: /* sys */
|
|
value = 1131; /* --> sys. */
|
|
break;
|
|
case 1881: /* bic */
|
|
case 1186: /* and */
|
|
value = 1186; /* --> and. */
|
|
break;
|
|
case 1169: /* mov */
|
|
case 1188: /* and */
|
|
value = 1188; /* --> and. */
|
|
break;
|
|
case 1173: /* movs */
|
|
case 1189: /* ands */
|
|
value = 1189; /* --> ands. */
|
|
break;
|
|
case 1882: /* cmple */
|
|
case 1224: /* cmpge */
|
|
value = 1224; /* --> cmpge. */
|
|
break;
|
|
case 1885: /* cmplt */
|
|
case 1227: /* cmpgt */
|
|
value = 1227; /* --> cmpgt. */
|
|
break;
|
|
case 1883: /* cmplo */
|
|
case 1229: /* cmphi */
|
|
value = 1229; /* --> cmphi. */
|
|
break;
|
|
case 1884: /* cmpls */
|
|
case 1232: /* cmphs */
|
|
value = 1232; /* --> cmphs. */
|
|
break;
|
|
case 1166: /* mov */
|
|
case 1254: /* cpy */
|
|
value = 1254; /* --> cpy. */
|
|
break;
|
|
case 1168: /* mov */
|
|
case 1255: /* cpy */
|
|
value = 1255; /* --> cpy. */
|
|
break;
|
|
case 1892: /* fmov */
|
|
case 1171: /* mov */
|
|
case 1256: /* cpy */
|
|
value = 1256; /* --> cpy. */
|
|
break;
|
|
case 1161: /* mov */
|
|
case 1268: /* dup */
|
|
value = 1268; /* --> dup. */
|
|
break;
|
|
case 1163: /* mov */
|
|
case 1160: /* mov */
|
|
case 1269: /* dup */
|
|
value = 1269; /* --> dup. */
|
|
break;
|
|
case 1891: /* fmov */
|
|
case 1165: /* mov */
|
|
case 1270: /* dup */
|
|
value = 1270; /* --> dup. */
|
|
break;
|
|
case 1164: /* mov */
|
|
case 1271: /* dupm */
|
|
value = 1271; /* --> dupm. */
|
|
break;
|
|
case 1886: /* eon */
|
|
case 1273: /* eor */
|
|
value = 1273; /* --> eor. */
|
|
break;
|
|
case 1174: /* not */
|
|
case 1275: /* eor */
|
|
value = 1275; /* --> eor. */
|
|
break;
|
|
case 1175: /* nots */
|
|
case 1276: /* eors */
|
|
value = 1276; /* --> eors. */
|
|
break;
|
|
case 1887: /* facle */
|
|
case 1281: /* facge */
|
|
value = 1281; /* --> facge. */
|
|
break;
|
|
case 1888: /* faclt */
|
|
case 1282: /* facgt */
|
|
value = 1282; /* --> facgt. */
|
|
break;
|
|
case 1889: /* fcmle */
|
|
case 1291: /* fcmge */
|
|
value = 1291; /* --> fcmge. */
|
|
break;
|
|
case 1890: /* fcmlt */
|
|
case 1293: /* fcmgt */
|
|
value = 1293; /* --> fcmgt. */
|
|
break;
|
|
case 1158: /* fmov */
|
|
case 1299: /* fcpy */
|
|
value = 1299; /* --> fcpy. */
|
|
break;
|
|
case 1157: /* fmov */
|
|
case 1316: /* fdup */
|
|
value = 1316; /* --> fdup. */
|
|
break;
|
|
case 1159: /* mov */
|
|
case 1614: /* orr */
|
|
value = 1614; /* --> orr. */
|
|
break;
|
|
case 1893: /* orn */
|
|
case 1615: /* orr */
|
|
value = 1615; /* --> orr. */
|
|
break;
|
|
case 1162: /* mov */
|
|
case 1617: /* orr */
|
|
value = 1617; /* --> orr. */
|
|
break;
|
|
case 1172: /* movs */
|
|
case 1618: /* orrs */
|
|
value = 1618; /* --> orrs. */
|
|
break;
|
|
case 1167: /* mov */
|
|
case 1674: /* sel */
|
|
value = 1674; /* --> sel. */
|
|
break;
|
|
case 1170: /* mov */
|
|
case 1675: /* sel */
|
|
value = 1675; /* --> sel. */
|
|
break;
|
|
default: return NULL;
|
|
}
|
|
|
|
return aarch64_opcode_table + value;
|
|
}
|
|
|
|
const char*
|
|
aarch64_insert_operand (const aarch64_operand *self,
|
|
const aarch64_opnd_info *info,
|
|
aarch64_insn *code, const aarch64_inst *inst)
|
|
{
|
|
/* Use the index as the key. */
|
|
int key = self - aarch64_operands;
|
|
switch (key)
|
|
{
|
|
case 1:
|
|
case 2:
|
|
case 3:
|
|
case 4:
|
|
case 5:
|
|
case 6:
|
|
case 7:
|
|
case 8:
|
|
case 9:
|
|
case 10:
|
|
case 14:
|
|
case 15:
|
|
case 16:
|
|
case 17:
|
|
case 19:
|
|
case 20:
|
|
case 21:
|
|
case 22:
|
|
case 23:
|
|
case 24:
|
|
case 25:
|
|
case 26:
|
|
case 27:
|
|
case 35:
|
|
case 36:
|
|
case 139:
|
|
case 140:
|
|
case 141:
|
|
case 142:
|
|
case 143:
|
|
case 144:
|
|
case 145:
|
|
case 146:
|
|
case 147:
|
|
case 148:
|
|
case 161:
|
|
case 162:
|
|
case 163:
|
|
case 164:
|
|
case 165:
|
|
case 166:
|
|
case 167:
|
|
case 168:
|
|
case 169:
|
|
case 170:
|
|
case 173:
|
|
return aarch64_ins_regno (self, info, code, inst);
|
|
case 12:
|
|
return aarch64_ins_reg_extended (self, info, code, inst);
|
|
case 13:
|
|
return aarch64_ins_reg_shifted (self, info, code, inst);
|
|
case 18:
|
|
return aarch64_ins_ft (self, info, code, inst);
|
|
case 28:
|
|
case 29:
|
|
case 30:
|
|
return aarch64_ins_reglane (self, info, code, inst);
|
|
case 31:
|
|
return aarch64_ins_reglist (self, info, code, inst);
|
|
case 32:
|
|
return aarch64_ins_ldst_reglist (self, info, code, inst);
|
|
case 33:
|
|
return aarch64_ins_ldst_reglist_r (self, info, code, inst);
|
|
case 34:
|
|
return aarch64_ins_ldst_elemlist (self, info, code, inst);
|
|
case 37:
|
|
case 47:
|
|
case 48:
|
|
case 49:
|
|
case 50:
|
|
case 51:
|
|
case 52:
|
|
case 53:
|
|
case 54:
|
|
case 55:
|
|
case 56:
|
|
case 57:
|
|
case 58:
|
|
case 59:
|
|
case 68:
|
|
case 69:
|
|
case 70:
|
|
case 71:
|
|
case 136:
|
|
case 138:
|
|
case 153:
|
|
case 154:
|
|
case 155:
|
|
case 156:
|
|
case 157:
|
|
case 158:
|
|
case 159:
|
|
case 160:
|
|
return aarch64_ins_imm (self, info, code, inst);
|
|
case 38:
|
|
case 39:
|
|
return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
|
|
case 40:
|
|
case 41:
|
|
case 42:
|
|
return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
|
|
case 46:
|
|
case 129:
|
|
return aarch64_ins_fpimm (self, info, code, inst);
|
|
case 60:
|
|
case 134:
|
|
return aarch64_ins_limm (self, info, code, inst);
|
|
case 61:
|
|
return aarch64_ins_aimm (self, info, code, inst);
|
|
case 62:
|
|
return aarch64_ins_imm_half (self, info, code, inst);
|
|
case 63:
|
|
return aarch64_ins_fbits (self, info, code, inst);
|
|
case 65:
|
|
case 66:
|
|
return aarch64_ins_cond (self, info, code, inst);
|
|
case 72:
|
|
case 78:
|
|
return aarch64_ins_addr_simple (self, info, code, inst);
|
|
case 73:
|
|
return aarch64_ins_addr_regoff (self, info, code, inst);
|
|
case 74:
|
|
case 75:
|
|
case 76:
|
|
return aarch64_ins_addr_simm (self, info, code, inst);
|
|
case 77:
|
|
return aarch64_ins_addr_uimm12 (self, info, code, inst);
|
|
case 79:
|
|
return aarch64_ins_simd_addr_post (self, info, code, inst);
|
|
case 80:
|
|
return aarch64_ins_sysreg (self, info, code, inst);
|
|
case 81:
|
|
return aarch64_ins_pstatefield (self, info, code, inst);
|
|
case 82:
|
|
case 83:
|
|
case 84:
|
|
case 85:
|
|
return aarch64_ins_sysins_op (self, info, code, inst);
|
|
case 86:
|
|
case 87:
|
|
return aarch64_ins_barrier (self, info, code, inst);
|
|
case 88:
|
|
return aarch64_ins_prfop (self, info, code, inst);
|
|
case 89:
|
|
return aarch64_ins_hint (self, info, code, inst);
|
|
case 90:
|
|
case 91:
|
|
case 92:
|
|
case 93:
|
|
return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst);
|
|
case 94:
|
|
return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst);
|
|
case 95:
|
|
return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst);
|
|
case 96:
|
|
case 97:
|
|
case 98:
|
|
case 99:
|
|
return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst);
|
|
case 100:
|
|
case 101:
|
|
case 102:
|
|
case 103:
|
|
case 104:
|
|
case 105:
|
|
case 106:
|
|
case 107:
|
|
case 108:
|
|
case 109:
|
|
case 110:
|
|
case 111:
|
|
return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst);
|
|
case 112:
|
|
case 113:
|
|
case 114:
|
|
case 115:
|
|
case 116:
|
|
case 117:
|
|
case 118:
|
|
case 119:
|
|
return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst);
|
|
case 120:
|
|
case 121:
|
|
case 122:
|
|
case 123:
|
|
return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst);
|
|
case 124:
|
|
return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst);
|
|
case 125:
|
|
return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst);
|
|
case 126:
|
|
return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst);
|
|
case 127:
|
|
return aarch64_ins_sve_aimm (self, info, code, inst);
|
|
case 128:
|
|
return aarch64_ins_sve_asimm (self, info, code, inst);
|
|
case 130:
|
|
return aarch64_ins_sve_float_half_one (self, info, code, inst);
|
|
case 131:
|
|
return aarch64_ins_sve_float_half_two (self, info, code, inst);
|
|
case 132:
|
|
return aarch64_ins_sve_float_zero_one (self, info, code, inst);
|
|
case 133:
|
|
return aarch64_ins_inv_limm (self, info, code, inst);
|
|
case 135:
|
|
return aarch64_ins_sve_limm_mov (self, info, code, inst);
|
|
case 137:
|
|
return aarch64_ins_sve_scale (self, info, code, inst);
|
|
case 149:
|
|
case 150:
|
|
return aarch64_ins_sve_shlimm (self, info, code, inst);
|
|
case 151:
|
|
case 152:
|
|
return aarch64_ins_sve_shrimm (self, info, code, inst);
|
|
case 171:
|
|
return aarch64_ins_sve_index (self, info, code, inst);
|
|
case 172:
|
|
case 174:
|
|
return aarch64_ins_sve_reglist (self, info, code, inst);
|
|
default: assert (0); abort ();
|
|
}
|
|
}
|