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Co-Authored-By: Lifang Xia <lifang_xia@c-sky.com> gas/ * config/tc-csky.c (float_work_fpuv3_fmovi): New function, helper function to encode fpuv3 fmovi instructions. (float_work_fpuv3_fstore): New function. (struct literal): Add new member 'offset'. (csky_cpus): New cpu CK860f. (enter_literal): Return literal pool pointer instead of offset. (parse_rt): Adjust the change of enter_literal. (parse_rtf): Likewise. (v1_work_lrw): Likewise. (v1_work_jbsr): Likewise. (v2_work_lrw): Likewise. (v2_work_jbsr): Likewise. (v2_work_jsri): Likewise. (vdsp_work_vlrw): Likewise. (is_freglist_legal): Add handler for FPUV3. (parse_type_freg): Likewise. (is_imm_within_range): Set e.X_add_number if it is a signed and negtive number. (get_operand_value): Add handler for OPRND_TYPE_IMM9b, OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and OPRND_TYPE_DFLOAT_FMOVI. (float_to_half): Convert float number to harf float. opcodes/ * csky-dis.c (csky_output_operand): Add handlers for OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH to support FPUV3 instructions. * csky-opc.h (enum operand_type): New enum OPRND_TYPE_IMM9b, OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and OPRND_TYPE_DFLOAT_FMOVI. (OPRND_MASK_4_5, OPRND_MASK_6, OPRND_MASK_6_7, OPRND_MASK_6_8, OPRND_MASK_7, OPRND_MASK_7_8, OPRND_MASK_17_24, OPRND_MASK_20, OPRND_MASK_20_21, OPRND_MASK_20_22, OPRND_MASK_20_23, OPRND_MASK_20_24, OPRND_MASK_20_25, OPRND_MASK_0_3or5_8, OPRND_MASK_0_3or6_7, OPRND_MASK_0_3or25, OPRND_MASK_0_4or21_24, OPRND_MASK_5or20_21, OPRND_MASK_5or20_22, OPRND_MASK_5or20_23, OPRND_MASK_5or20_24, OPRND_MASK_5or20_25, OPRND_MASK_8_9or21_25, OPRND_MASK_8_9or16_25, OPRND_MASK_4_6or20, OPRND_MASK_5_7or20, OPRND_MASK_4_5or20or25, OPRND_MASK_4_6or20or25, OPRND_MASK_4_7or20or25, OPRND_MASK_6_9or17_24, OPRND_MASK_6_7or20, OPRND_MASK_6or20, OPRND_MASK_7or20, OPRND_MASK_5or8_9or16_25, OPRND_MASK_5or8_9or20_25): Define. (csky_v2_opcodes): Add FPUV3 instructions. include/ * opcode/csky.h (CSKY_ISA_FLOAT_7E60): Define.
118 lines
4.1 KiB
C
118 lines
4.1 KiB
C
/* C-SKY assembler/disassembler support.
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Copyright (C) 2004-2020 Free Software Foundation, Inc.
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Contributed by C-SKY Microsystems and Mentor Graphics.
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This file is part of GDB and GAS.
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GDB and GAS are free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 3, or (at
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your option) any later version.
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GDB and GAS are distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GDB or GAS; see the file COPYING3. If not, write to the
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "dis-asm.h"
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/* The following bitmasks control instruction set architecture. */
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#define CSKYV1_ISA_E1 (1L << 0)
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#define CSKYV2_ISA_E1 (1L << 1)
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#define CSKYV2_ISA_1E2 (1L << 2)
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#define CSKYV2_ISA_2E3 (1L << 3)
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#define CSKYV2_ISA_3E7 (1L << 4)
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#define CSKYV2_ISA_7E10 (1L << 5)
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#define CSKYV2_ISA_3E3R1 (1L << 6)
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#define CSKYV2_ISA_3E3R2 (1L << 7)
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#define CSKYV2_ISA_10E60 (1L << 8)
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#define CSKYV2_ISA_3E3R3 (1L << 9)
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#define CSKY_ISA_TRUST (1L << 11)
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#define CSKY_ISA_CACHE (1L << 12)
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#define CSKY_ISA_NVIC (1L << 13)
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#define CSKY_ISA_CP (1L << 14)
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#define CSKY_ISA_MP (1L << 15)
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#define CSKY_ISA_MP_1E2 (1L << 16)
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#define CSKY_ISA_JAVA (1L << 17)
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#define CSKY_ISA_MAC (1L << 18)
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#define CSKY_ISA_MAC_DSP (1L << 19)
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/* Base ISA for csky v1 and v2. */
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#define CSKY_ISA_DSP (1L << 20)
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#define CSKY_ISA_DSP_1E2 (1L << 21)
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#define CSKY_ISA_DSP_ENHANCE (1L << 22)
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/* Base float instruction (803f & 810f). */
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#define CSKY_ISA_FLOAT_E1 (1L << 25)
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/* M_FLOAT support (810f). */
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#define CSKY_ISA_FLOAT_1E2 (1L << 26)
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/* 803 support (803f). */
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#define CSKY_ISA_FLOAT_1E3 (1L << 27)
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/* 807 support (803f & 807f). */
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#define CSKY_ISA_FLOAT_3E4 (1L << 28)
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/* 860 support. */
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#define CSKY_ISA_FLOAT_7E60 (1L << 36)
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/* Vector DSP support. */
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#define CSKY_ISA_VDSP (1L << 29)
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#define CSKY_ISA_VDSP_2 (1L << 30)
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/* The following bitmasks control cpu architecture for CSKY. */
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#define CSKY_ABI_V1 (1 << 28)
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#define CSKY_ABI_V2 (2 << 28)
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#define CSKY_ARCH_MASK 0x0000001F
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#define CSKY_ABI_MASK 0xF0000000
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#define CSKY_ARCH_510 0x1
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#define CSKY_ARCH_610 0x2
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#define CSKY_ARCH_801 0xa
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#define CSKY_ARCH_802 0x10
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#define CSKY_ARCH_803 0x9
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#define CSKY_ARCH_807 0x6
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#define CSKY_ARCH_810 0x8
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#define CSKY_ARCH_860 0xb
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#define CSKY_ARCH_MAC (1 << 15)
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#define CSKY_ARCH_DSP (1 << 14)
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#define CSKY_ARCH_FLOAT (1 << 13)
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#define CSKY_ARCH_SIMD (1 << 12)
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#define CSKY_ARCH_CP (1 << 11)
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#define CSKY_ARCH_MP (1 << 10)
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#define CSKY_ARCH_CACHE (1 << 9)
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#define CSKY_ARCH_JAVA (1 << 8)
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#define CSKY_ARCH_APS (1 << 7)
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#define IS_CSKY_V1(a) \
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(((a) & CSKY_ABI_MASK) == CSKY_ABI_V1)
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#define IS_CSKY_V2(a) \
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(((a) & CSKY_ABI_MASK) == CSKY_ABI_V2)
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#define IS_CSKY_ARCH_V1(a) \
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(((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510 \
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|| ((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610)
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#define IS_CSKY_ARCH_V2(a) \
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(!(IS_CSKY_ARCH_V1 (a)))
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#define IS_CSKY_ARCH_510(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510)
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#define IS_CSKY_ARCH_610(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610)
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#define IS_CSKY_ARCH_801(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_801)
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#define IS_CSKY_ARCH_802(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_802)
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#define IS_CSKY_ARCH_803(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_803)
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#define IS_CSKY_ARCH_807(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_807)
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#define IS_CSKY_ARCH_810(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_810)
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#define CPU_ARCH_MASK \
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(CSKY_ARCH_JAVA | CSKY_ARCH_FLOAT | CSKY_ARCH_DSP | CSKY_ARCH_MASK)
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern int print_insn_csky (bfd_vma memaddr, struct disassemble_info *info);
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#ifdef __cplusplus
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}
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#endif
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