Mike Frysinger 5471128011 opcodes: cris: move desc & opc files from sim/ ... All other cgen ports keep their generated desc & opc files under opcodes/, so move the cris files over too. The cris-opc.c file, while not generated, is already here to complement.		2021-05-24 18:42:34 -04:00
..
aclocal.m4	sim: regen against sim/m4/	2021-04-21 20:40:51 -04:00
arch.c
arch.h
ChangeLog	opcodes: cris: move desc & opc files from sim/	2021-05-24 18:42:34 -04:00
config.in	sim: riscv: move __int128 check to configure	2021-05-16 00:04:17 -04:00
configure	sim: riscv: move __int128 check to configure	2021-05-16 00:04:17 -04:00
configure.ac	sim: simplify hardware m4 macro	2021-04-23 21:58:21 -04:00
cpuall.h
cpuv10.c
cpuv10.h
cpuv32.c
cpuv32.h
cris-sim.h
cris-tmpl.c	sim: switch config.h usage to defs.h	2021-05-16 22:38:41 -04:00
crisv10f.c	sim: switch config.h usage to defs.h	2021-05-16 22:38:41 -04:00
crisv32f.c	sim: switch config.h usage to defs.h	2021-05-16 22:38:41 -04:00
decodev10.c
decodev10.h
decodev32.c
decodev32.h
dv-cris_900000xx.c	sim: switch config.h usage to defs.h	2021-05-16 22:38:41 -04:00
dv-cris.c	sim: switch config.h usage to defs.h	2021-05-16 22:38:41 -04:00
dv-rv.c	sim: switch config.h usage to defs.h	2021-05-16 22:38:41 -04:00
Makefile.in	opcodes: cris: move desc & opc files from sim/	2021-05-24 18:42:34 -04:00
mloop.in	Add missing stdlib.h includes to sim	2021-05-04 13:19:33 -06:00
modelv10.c
modelv32.c
rvdummy.c	sim: switch config.h usage to defs.h	2021-05-16 22:38:41 -04:00
semcrisv10f-switch.c
semcrisv32f-switch.c
sim-if.c	sim: cris: fix memory setup typos	2021-05-23 23:43:37 -04:00
sim-main.h	sim: cgen: invert sim_state storage for cgen ports	2021-05-17 00:46:32 -04:00
traps.c	sim: switch config.h usage to defs.h	2021-05-16 22:38:41 -04:00