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6451799480
This patch adds support for the new SPARC M8 processor (implementing OSA 2017) to binutils. New instructions: - Dictionary Unpack + dictunpack - Partitioned Compare with shifted result + Signed variants: fpcmp{le,gt,eq,ne}{8,16,32}shl + Unsigned variants: fpcmpu{le,gt}{8,16,32}shl - Partitioned Dual-Equal compared, with shifted result + fpcmpde{8,16,32}shl - Partitioned Unsigned Range Compare, with shifted result + fpcmpur{8,16,32}shl - 64-bit shifts on Floating-Point registers + fps{ll,ra,rl}64x - Misaligned loads and stores + ldm{sh,uh,sw,uw,x,ux} + ldm{sh,uh,sw,uw,x,ux}a + ldmf{s,d} + ldmf{s,d}a + stm{h,w,x} + stm{h,w,x}a + stmf{s,d} + stmf{s,d}a - Oracle Numbers + on{add,sub,mul,div} - Reverse Bytes/Bits + revbitsb + revbytes{h,w,x} - Run-Length instructions + rle_burst + rle_length - New crypto instructions + sha3 - Instruction to read the new register %entropy + rd %entropy New Alternate Address Identifiers: - 0x24, #ASI_CORE_COMMIT_COUNT - 0x24, #ASI_CORE_SELECT_COUNT - 0x48, #ASI_ARF_ECC_REG - 0x53, #ASI_ITLB_PROBE - 0x58, #ASI_DSFAR - 0x5a, #ASI_DTLB_PROBE_PRIMARY - 0x5b, #ASI_DTLB_PROBE_REAL - 0x64, #ASI_CORE_SELECT_COMMIT_NHT The new assembler command-line options for selecting the M8 architecture are: -Av9m8 or -Asparc6 for 64-bit binaries. -Av8plusm8 for 32-bit (v8+) binaries. The corresponding disassembler command-line options are: -msparc:v9m8 for 64-bit binaries. -msparc:v8plusm8 for 32-bit (v8+) binaries. Tested for regressions in the following targets: sparc-aout sparc-linux sparc-vxworks sparc64-linux bfd/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * archures.c (bfd_mach_sparc_v9m8): Define. (bfd_mach_sparc_v8plusm8): Likewise. (bfd_mach_sparc_v9_p): Adjust to M8. (bfd_mach_sparc_64bit_p): Likewise. * aoutx.h (machine_type): Handle bfd_mach_sparc_v9m8 and bfd_mach_sparc_v8plusm8. * bfd-in2.h: Regenerated. * cpu-sparc.c (arch_info_struct): Entries for sparc:v9m8 and sparc:v8plusm8. * elfxx-sparc.c (_bfd_sparc_elf_object_p): Handle bfd_mach_sparc_v8plusm8 and bfd_mach_sparc_v9m8 using the new hw capabilities ONADDSUB, ONMUL, ONDIV, DICTUNP, FPCPSHL, RLE and SHA3. * elf32-sparc.c (elf32_sparc_final_write_processing): Handle bfd_mach_sparc_v8plusm8. binutils/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * NEWS: Mention the SPARC M8 support. gas/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-sparc.c (sparc_arch_table): Entries for `sparc6', `v9m8' and `v8plusm8'. (sparc_md_end): Handle SPARC_OPCODE_ARCH_M8. (get_hwcap_name): Support the M8 hardware capabilities. (sparc_ip): Handle new operand types. * doc/c-sparc.texi (Sparc-Opts): Document -Av9m8, -Av8plusm8 and -Asparc6, and the corresponding -xarch aliases. * testsuite/gas/sparc/sparc6.s: New file. * testsuite/gas/sparc/sparc6.d: Likewise. * testsuite/gas/sparc/sparc6-diag.s: Likewise. * testsuite/gas/sparc/sparc6-diag.l: Likewise. * testsuite/gas/sparc/fpcmpshl.s: Likewise. * testsuite/gas/sparc/fpcmpshl.d: Likewise. * testsuite/gas/sparc/fpcmpshl-diag.s: Likewise. * testsuite/gas/sparc/fpcmpshl-diag.l: Likewise. * testsuite/gas/sparc/ldm-stm.s: Likewise. * testsuite/gas/sparc/ldm-stm.d: Likewise. * testsuite/gas/sparc/ldm-stm-diag.s: Likewise. * testsuite/gas/sparc/ldm-stm-diag.l: Likewise. * testsuite/gas/sparc/ldmf-stmf.s: Likewise. * testsuite/gas/sparc/ldmf-stmf.d: Likewise. * testsuite/gas/sparc/ldmf-stmf-diag.s: Likewise. * testsuite/gas/sparc/ldmf-stmf-diag.l: Likewise. * testsuite/gas/sparc/on.s: Likewise. * testsuite/gas/sparc/on.d: Likewise. * testsuite/gas/sparc/on-diag.s: Likewise. * testsuite/gas/sparc/on-diag.l: Likewise. * testsuite/gas/sparc/rle.s: Likewise. * testsuite/gas/sparc/rle.d: Likewise. * testsuite/gas/sparc/sparc.exp (gas_64_check): Run new tests. * testsuite/gas/sparc/rdasr.s: Add test for RDENTROPY. * testsuite/gas/sparc/rdasr.d: Likewise. include/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * elf/sparc.h (ELF_SPARC_HWCAP2_SPARC6): Define. (ELF_SPARC_HWCAP2_ONADDSUB): Likewise. (ELF_SPARC_HWCAP2_ONMUL): Likewise. (ELF_SPARC_HWCAP2_ONDIV): Likewise. (ELF_SPARC_HWCAP2_DICTUNP): Likewise. (ELF_SPARC_HWCAP2_FPCMPSHL): Likewise. (ELF_SPARC_HWCAP2_RLE): Likewise. (ELF_SPARC_HWCAP2_SHA3): Likewise. * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_M8 and adjust SPARC_OPCODE_ARCH_MAX. (HWCAP2_SPARC6): Define. (HWCAP2_ONADDSUB): Likewise. (HWCAP2_ONMUL): Likewise. (HWCAP2_ONDIV): Likewise. (HWCAP2_DICTUNP): Likewise. (HWCAP2_FPCMPSHL): Likewise. (HWCAP2_RLE): Likewise. (HWCAP2_SHA3): Likewise. (OPM): Likewise. (OPMI): Likewise. (ONFCN): Likewise. (REVFCN): Likewise. (SIMM10): Likewise. opcodes/ChangeLog: 2017-05-19 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-dis.c (MASK_V9): Include SPARC_OPCODE_ARCH_M8. (X_IMM2): Define. (compute_arch_mask): Handle bfd_mach_sparc_v8plusm8 and bfd_mach_sparc_v9m8. (print_insn_sparc): Handle new operand types. * sparc-opc.c (MASK_M8): Define. (v6): Add MASK_M8. (v6notlet): Likewise. (v7): Likewise. (v8): Likewise. (v9): Likewise. (v9a): Likewise. (v9b): Likewise. (v9c): Likewise. (v9d): Likewise. (v9e): Likewise. (v9v): Likewise. (v9m): Likewise. (v9andleon): Likewise. (m8): Define. (HWS_VM8): Define. (HWS2_VM8): Likewise. (sparc_opcode_archs): Add entry for "m8". (sparc_opcodes): Add OSA2017 and M8 instructions dictunpack, fpcmp{ule,ugt,eq,ne,de,ur}{8,16,32}shl, fpx{ll,ra,rl}64x, ldm{sh,uh,sw,uw,x,ux}, ldm{sh,uh,sw,uw,x,ux}a, ldmf{s,d}, ldmf{s,d}a, on{add,sub,mul,div}, rdentropy, revbitsb, revbytes{h,w,x}, rle_burst, rle_length, sha3, stm{h,w,x}, stm{h,w,x}a, stmf{s,d}, stmf{s,d}a. (asi_table): New M8 ASIs ASI_CORE_COMMIT_COUNT, ASI_CORE_SELECT_COUNT, ASI_ARF_ECC_REG, ASI_ITLB_PROBE, ASI_DSFAR, ASI_DTLB_PROBE_PRIMARY, ASI_DTLB_PROBE_REAL, ASI_CORE_SELECT_COMMIT_NHT.
360 lines
7.5 KiB
C
360 lines
7.5 KiB
C
/* BFD support for the SPARC architecture.
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Copyright (C) 1992-2017 Free Software Foundation, Inc.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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static const bfd_arch_info_type arch_info_struct[] =
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{
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_sparclet,
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"sparc",
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"sparc:sparclet",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[1],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_sparclite,
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"sparc",
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"sparc:sparclite",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[2],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8plus,
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"sparc",
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"sparc:v8plus",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[3],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8plusa,
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"sparc",
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"sparc:v8plusa",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[4],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_sparclite_le,
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"sparc",
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"sparc:sparclite_le",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[5],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9,
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"sparc",
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"sparc:v9",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[6],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9a,
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"sparc",
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"sparc:v9a",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[7],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8plusb,
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"sparc",
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"sparc:v8plusb",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[8],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9b,
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"sparc",
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"sparc:v9b",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[9],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8plusc,
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"sparc",
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"sparc:v8plusc",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[10],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9c,
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"sparc",
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"sparc:v9c",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[11],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8plusd,
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"sparc",
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"sparc:v8plusd",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[12],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9d,
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"sparc",
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"sparc:v9d",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[13],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8pluse,
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"sparc",
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"sparc:v8pluse",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[14],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9e,
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"sparc",
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"sparc:v9e",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[15],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8plusv,
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"sparc",
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"sparc:v8plusv",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[16],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9v,
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"sparc",
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"sparc:v9v",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[17],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8plusm,
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"sparc",
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"sparc:v8plusm",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[18],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9m,
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"sparc",
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"sparc:v9m",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[19],
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},
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v8plusm8,
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"sparc",
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"sparc:v8plusm8",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[20],
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},
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{
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64, /* bits in a word */
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64, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc_v9m8,
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"sparc",
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"sparc:v9m8",
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3,
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FALSE,
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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0,
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}
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};
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const bfd_arch_info_type bfd_sparc_arch =
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{
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32, /* bits in a word */
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32, /* bits in an address */
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8, /* bits in a byte */
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bfd_arch_sparc,
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bfd_mach_sparc,
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"sparc",
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"sparc",
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3,
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TRUE, /* the default */
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bfd_default_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&arch_info_struct[0],
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};
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