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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
112 lines
1.8 KiB
ArmAsm
112 lines
1.8 KiB
ArmAsm
# Blackfin testcase for having RETI set correctly
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# mach: bfin
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# sim: --environment operating
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#include "test.h"
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.include "testutils.inc"
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# This test keeps P5 as the base of the EVT table
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.macro set_evt lvl:req, sym:req
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loadsym R1, \sym;
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[P5 + 4 * \lvl\()] = R1;
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.endm
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start
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# First mark all EVTs as fails (they shouldn't be activated)
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imm32 P5, EVT0;
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P1 = P5;
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loadsym R1, fail_lvl
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imm32 P2, 16
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LSETUP (1f, 1f) LC0 = P2;
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1: [P1++] = R1;
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# We'll bounce up a few
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set_evt 6, evt6;
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set_evt 7, evt7;
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set_evt 8, evt8;
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set_evt 9, evt9;
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# Lower ourselves down so we can RAISE up
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set_evt 14, evt14;
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loadsym R1, wait;
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RETI = R1;
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RAISE 14;
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R7 = -1;
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sti R7;
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RTI;
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wait:
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jump wait;
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evt14:
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# Activate interrupt nesting early
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[--SP] = RETI;
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# We activate the interrupt here ...
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loadsym R1, 1f;
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RAISE 9;
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# ... but we should RETI here
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1: JUMP fail_lvl;
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evt9:
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R2 = RETI;
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CC = R1 == R2;
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IF !CC JUMP fail_lvl;
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# We activate the interrupt here ...
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loadsym R1, 1f;
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RAISE 8;
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[--SP] = RETI;
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# ... but we should RETI here
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1: JUMP fail_lvl;
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evt8:
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R2 = RETI;
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CC = R1 == R2;
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IF !CC JUMP fail_lvl;
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# Activate interrupt nesting early
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[--SP] = RETI;
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# We activate the interrupt here ...
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loadsym R1, 1f;
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cli R7;
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RAISE 7;
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sti R7;
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# ... but we should RETI here
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1: JUMP fail_lvl;
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evt7:
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R2 = RETI;
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CC = R1 == R2;
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IF !CC JUMP fail_lvl;
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# Activate interrupt nesting early
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[--SP] = RETI;
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# We activate the interrupt here ...
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imm32 P0, IMASK
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R7 = [P0];
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R6 = 0;
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[P0] = R6;
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loadsym R1, 1f;
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RAISE 6;
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[P0] = R7;
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# ... but we should RETI here
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# don't jump to fail_lvl as the pipeline might advance
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# the PC to the fail_lvl point before the ivg actually
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# gets a chance to fire
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1: JUMP 1b;
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evt6:
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R2 = RETI;
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CC = R1 == R2;
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IF !CC JUMP fail_lvl;
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dbg_pass
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fail_lvl:
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dbg_fail;
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