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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
65 lines
2.0 KiB
ArmAsm
65 lines
2.0 KiB
ArmAsm
# Verify registers saturate and ASTAT bits are updated correctly
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# with the RND12 subtract insn
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# mach: bfin
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#include "test.h"
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.include "testutils.inc"
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start
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dmm32 ASTAT, (0x24a00410 | _VS | _AV1S | _AV0 | _AC0 | _AC0_COPY | _AN);
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imm32 R5, 0x0fb35119;
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imm32 R6, 0xffffffff;
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imm32 R7, 0x80000000;
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R6.H = R5 - R7 (RND12);
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checkreg R6, 0x7fffffff;
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checkreg ASTAT, (0x24a00410 | _VS | _V | _AV1S | _AV0 | _AC0 | _V_COPY | _AC0_COPY);
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dmm32 ASTAT, (0x08c08000 | _VS | _AV0S | _AC0 | _AQ | _CC | _AC0_COPY);
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imm32 R3, 0x80003f8f;
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imm32 R5, 0x6267c92c;
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imm32 R6, 0x80000000;
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R5.L = R3 - R6 (RND12);
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checkreg R5, 0x62670004;
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checkreg ASTAT, (0x08c08000 | _VS | _AV0S | _AC0 | _AQ | _CC | _AC0_COPY);
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dmm32 ASTAT, (0x04200c10 | _VS | _V | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _V_COPY);
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imm32 R1, 0x7fff0000;
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imm32 R5, 0x80000000;
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R1.L = R5 - R5 (RND12);
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checkreg ASTAT, (0x04200c10 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _AZ);
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checkreg R1, 0x7fff0000;
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checkreg R5, 0x80000000;
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dmm32 ASTAT, (0x40600e90 | _VS | _AV1S | _AV0S | _AQ | _CC);
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imm32 R1, 0x80000000;
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imm32 R5, 0x00008000;
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imm32 R6, 0x00000000;
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R5.L = R6 - R1 (RND12);
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checkreg R5, 0x00007fff;
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checkreg ASTAT, (0x40600e90 | _VS | _V | _AV1S | _AV0S | _AQ | _CC | _V_COPY);
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dmm32 ASTAT, (0x68300880 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _AC0_COPY | _AZ);
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imm32 R1, 0xf8ed0000;
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imm32 R6, 0x80000000;
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R1.H = R1 - R6 (RND12);
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checkreg R1, 0x7fff0000;
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checkreg ASTAT, (0x68300880 | _VS | _V | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _V_COPY | _AC0_COPY);
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dmm32 ASTAT, (0x70d0c410 | _VS | _AV0S | _AQ);
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imm32 R0, 0x80000000;
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imm32 R1, 0x71455f95;
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imm32 R4, 0xd4871012;
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R4.H = R1 - R0 (RND12);
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checkreg R4, 0x7fff1012;
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checkreg ASTAT, (0x70d0c410 | _VS | _V | _AV0S | _AQ | _V_COPY);
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dmm32 ASTAT, (0x34500e00 | _VS | _AV0S | _AC1 | _CC | _AZ);
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imm32 R2, 0x00000000;
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imm32 R5, 0x00000000;
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imm32 R6, 0x80000000;
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R2.L = R5 - R6 (RND12);
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checkreg R2, 0x00007fff;
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checkreg ASTAT, (0x34500e00 | _VS | _V | _AV0S | _AC1 | _CC | _V_COPY);
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pass
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