mirror of
https://sourceware.org/git/binutils-gdb.git
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6d3d12ebef
This commit includes string.h in common-defs.h and removes all other inclusions. gdb/ 2014-08-07 Gary Benson <gbenson@redhat.com> * common/common-defs.h: Include string.h. * aarch64-tdep.c: Do not include string.h. * ada-exp.y: Likewise. * ada-lang.c: Likewise. * ada-lex.l: Likewise. * ada-typeprint.c: Likewise. * ada-valprint.c: Likewise. * aix-thread.c: Likewise. * alpha-linux-tdep.c: Likewise. * alpha-mdebug-tdep.c: Likewise. * alpha-nat.c: Likewise. * alpha-osf1-tdep.c: Likewise. * alpha-tdep.c: Likewise. * alphanbsd-tdep.c: Likewise. * amd64-dicos-tdep.c: Likewise. * amd64-linux-tdep.c: Likewise. * amd64-nat.c: Likewise. * amd64-sol2-tdep.c: Likewise. * amd64fbsd-tdep.c: Likewise. * amd64obsd-tdep.c: Likewise. * arch-utils.c: Likewise. * arm-linux-nat.c: Likewise. * arm-linux-tdep.c: Likewise. * arm-tdep.c: Likewise. * arm-wince-tdep.c: Likewise. * armbsd-tdep.c: Likewise. * armnbsd-nat.c: Likewise. * armnbsd-tdep.c: Likewise. * armobsd-tdep.c: Likewise. * avr-tdep.c: Likewise. * ax-gdb.c: Likewise. * ax-general.c: Likewise. * bcache.c: Likewise. * bfin-tdep.c: Likewise. * breakpoint.c: Likewise. * build-id.c: Likewise. * buildsym.c: Likewise. * c-exp.y: Likewise. * c-lang.c: Likewise. * c-typeprint.c: Likewise. * c-valprint.c: Likewise. * charset.c: Likewise. * cli-out.c: Likewise. * cli/cli-cmds.c: Likewise. * cli/cli-decode.c: Likewise. * cli/cli-dump.c: Likewise. * cli/cli-interp.c: Likewise. * cli/cli-logging.c: Likewise. * cli/cli-script.c: Likewise. * cli/cli-setshow.c: Likewise. * cli/cli-utils.c: Likewise. * coffread.c: Likewise. * common/agent.c: Likewise. * common/buffer.c: Likewise. * common/buffer.h: Likewise. * common/common-utils.c: Likewise. * common/filestuff.c: Likewise. * common/filestuff.c: Likewise. * common/format.c: Likewise. * common/print-utils.c: Likewise. * common/rsp-low.c: Likewise. * common/signals.c: Likewise. * common/vec.h: Likewise. * common/xml-utils.c: Likewise. * core-regset.c: Likewise. * corefile.c: Likewise. * corelow.c: Likewise. * cp-abi.c: Likewise. * cp-name-parser.y: Likewise. * cp-support.c: Likewise. * cp-valprint.c: Likewise. * cris-tdep.c: Likewise. * d-exp.y: Likewise. * darwin-nat.c: Likewise. * dbxread.c: Likewise. * dcache.c: Likewise. * demangle.c: Likewise. * dicos-tdep.c: Likewise. * disasm.c: Likewise. * doublest.c: Likewise. * dsrec.c: Likewise. * dummy-frame.c: Likewise. * dwarf2-frame.c: Likewise. * dwarf2loc.c: Likewise. * dwarf2read.c: Likewise. * elfread.c: Likewise. * environ.c: Likewise. * eval.c: Likewise. * event-loop.c: Likewise. * exceptions.c: Likewise. * exec.c: Likewise. * expprint.c: Likewise. * f-exp.y: Likewise. * f-lang.c: Likewise. * f-typeprint.c: Likewise. * f-valprint.c: Likewise. * fbsd-nat.c: Likewise. * findcmd.c: Likewise. * findvar.c: Likewise. * fork-child.c: Likewise. * frame.c: Likewise. * frv-linux-tdep.c: Likewise. * frv-tdep.c: Likewise. * gdb.c: Likewise. * gdb_bfd.c: Likewise. * gdbarch.c: Likewise. * gdbarch.sh: Likewise. * gdbtypes.c: Likewise. * gnu-nat.c: Likewise. * gnu-v2-abi.c: Likewise. * gnu-v3-abi.c: Likewise. * go-exp.y: Likewise. * go-lang.c: Likewise. * go32-nat.c: Likewise. * guile/guile.c: Likewise. * guile/scm-auto-load.c: Likewise. * hppa-hpux-tdep.c: Likewise. * hppa-linux-nat.c: Likewise. * hppanbsd-tdep.c: Likewise. * hppaobsd-tdep.c: Likewise. * i386-cygwin-tdep.c: Likewise. * i386-dicos-tdep.c: Likewise. * i386-linux-tdep.c: Likewise. * i386-nto-tdep.c: Likewise. * i386-sol2-tdep.c: Likewise. * i386-tdep.c: Likewise. * i386bsd-tdep.c: Likewise. * i386gnu-nat.c: Likewise. * i386nbsd-tdep.c: Likewise. * i386obsd-tdep.c: Likewise. * i387-tdep.c: Likewise. * ia64-libunwind-tdep.c: Likewise. * ia64-linux-nat.c: Likewise. * inf-child.c: Likewise. * inf-ptrace.c: Likewise. * inf-ttrace.c: Likewise. * infcall.c: Likewise. * infcmd.c: Likewise. * inflow.c: Likewise. * infrun.c: Likewise. * interps.c: Likewise. * iq2000-tdep.c: Likewise. * irix5-nat.c: Likewise. * jv-exp.y: Likewise. * jv-lang.c: Likewise. * jv-typeprint.c: Likewise. * jv-valprint.c: Likewise. * language.c: Likewise. * linux-fork.c: Likewise. * linux-nat.c: Likewise. * lm32-tdep.c: Likewise. * m2-exp.y: Likewise. * m2-typeprint.c: Likewise. * m32c-tdep.c: Likewise. * m32r-linux-nat.c: Likewise. * m32r-linux-tdep.c: Likewise. * m32r-rom.c: Likewise. * m32r-tdep.c: Likewise. * m68hc11-tdep.c: Likewise. * m68k-tdep.c: Likewise. * m68kbsd-tdep.c: Likewise. * m68klinux-nat.c: Likewise. * m68klinux-tdep.c: Likewise. * m88k-tdep.c: Likewise. * machoread.c: Likewise. * macrocmd.c: Likewise. * main.c: Likewise. * mdebugread.c: Likewise. * mem-break.c: Likewise. * memattr.c: Likewise. * memory-map.c: Likewise. * mep-tdep.c: Likewise. * mi/mi-cmd-break.c: Likewise. * mi/mi-cmd-disas.c: Likewise. * mi/mi-cmd-env.c: Likewise. * mi/mi-cmd-stack.c: Likewise. * mi/mi-cmd-var.c: Likewise. * mi/mi-cmds.c: Likewise. * mi/mi-console.c: Likewise. * mi/mi-getopt.c: Likewise. * mi/mi-interp.c: Likewise. * mi/mi-main.c: Likewise. * mi/mi-parse.c: Likewise. * microblaze-rom.c: Likewise. * microblaze-tdep.c: Likewise. * mingw-hdep.c: Likewise. * minidebug.c: Likewise. * minsyms.c: Likewise. * mips-irix-tdep.c: Likewise. * mips-linux-tdep.c: Likewise. * mips-tdep.c: Likewise. * mips64obsd-tdep.c: Likewise. * mipsnbsd-tdep.c: Likewise. * mipsread.c: Likewise. * mn10300-linux-tdep.c: Likewise. * mn10300-tdep.c: Likewise. * monitor.c: Likewise. * moxie-tdep.c: Likewise. * mt-tdep.c: Likewise. * nat/linux-btrace.c: Likewise. * nat/linux-osdata.c: Likewise. * nat/linux-procfs.c: Likewise. * nat/linux-ptrace.c: Likewise. * nat/linux-waitpid.c: Likewise. * nbsd-tdep.c: Likewise. * nios2-linux-tdep.c: Likewise. * nto-procfs.c: Likewise. * nto-tdep.c: Likewise. * objc-lang.c: Likewise. * objfiles.c: Likewise. * opencl-lang.c: Likewise. * osabi.c: Likewise. * osdata.c: Likewise. * p-exp.y: Likewise. * p-lang.c: Likewise. * p-typeprint.c: Likewise. * parse.c: Likewise. * posix-hdep.c: Likewise. * ppc-linux-nat.c: Likewise. * ppc-sysv-tdep.c: Likewise. * ppcfbsd-tdep.c: Likewise. * ppcnbsd-tdep.c: Likewise. * ppcobsd-tdep.c: Likewise. * printcmd.c: Likewise. * procfs.c: Likewise. * prologue-value.c: Likewise. * python/py-auto-load.c: Likewise. * python/py-gdb-readline.c: Likewise. * ravenscar-thread.c: Likewise. * regcache.c: Likewise. * registry.c: Likewise. * remote-fileio.c: Likewise. * remote-m32r-sdi.c: Likewise. * remote-mips.c: Likewise. * remote-notif.c: Likewise. * remote-sim.c: Likewise. * remote.c: Likewise. * reverse.c: Likewise. * rs6000-aix-tdep.c: Likewise. * ser-base.c: Likewise. * ser-go32.c: Likewise. * ser-mingw.c: Likewise. * ser-pipe.c: Likewise. * ser-tcp.c: Likewise. * ser-unix.c: Likewise. * serial.c: Likewise. * sh-tdep.c: Likewise. * sh64-tdep.c: Likewise. * shnbsd-tdep.c: Likewise. * skip.c: Likewise. * sol-thread.c: Likewise. * solib-dsbt.c: Likewise. * solib-frv.c: Likewise. * solib-osf.c: Likewise. * solib-som.c: Likewise. * solib-spu.c: Likewise. * solib-target.c: Likewise. * solib.c: Likewise. * somread.c: Likewise. * source.c: Likewise. * sparc-nat.c: Likewise. * sparc-sol2-tdep.c: Likewise. * sparc-tdep.c: Likewise. * sparc64-tdep.c: Likewise. * sparc64fbsd-tdep.c: Likewise. * sparc64nbsd-tdep.c: Likewise. * sparcnbsd-tdep.c: Likewise. * spu-linux-nat.c: Likewise. * spu-multiarch.c: Likewise. * spu-tdep.c: Likewise. * stabsread.c: Likewise. * stack.c: Likewise. * std-regs.c: Likewise. * symfile.c: Likewise. * symmisc.c: Likewise. * symtab.c: Likewise. * target.c: Likewise. * thread.c: Likewise. * tilegx-linux-nat.c: Likewise. * tilegx-tdep.c: Likewise. * top.c: Likewise. * tracepoint.c: Likewise. * tui/tui-command.c: Likewise. * tui/tui-data.c: Likewise. * tui/tui-disasm.c: Likewise. * tui/tui-file.c: Likewise. * tui/tui-layout.c: Likewise. * tui/tui-out.c: Likewise. * tui/tui-regs.c: Likewise. * tui/tui-source.c: Likewise. * tui/tui-stack.c: Likewise. * tui/tui-win.c: Likewise. * tui/tui-windata.c: Likewise. * tui/tui-winsource.c: Likewise. * typeprint.c: Likewise. * ui-file.c: Likewise. * ui-out.c: Likewise. * user-regs.c: Likewise. * utils.c: Likewise. * v850-tdep.c: Likewise. * valarith.c: Likewise. * valops.c: Likewise. * valprint.c: Likewise. * value.c: Likewise. * varobj.c: Likewise. * vax-tdep.c: Likewise. * vaxnbsd-tdep.c: Likewise. * vaxobsd-tdep.c: Likewise. * windows-nat.c: Likewise. * xcoffread.c: Likewise. * xml-support.c: Likewise. * xstormy16-tdep.c: Likewise. * xtensa-linux-nat.c: Likewise. gdb/gdbserver/ 2014-08-07 Gary Benson <gbenson@redhat.com> * server.h: Do not include string.h. * event-loop.c: Likewise. * linux-low.c: Likewise. * regcache.c: Likewise. * remote-utils.c: Likewise. * spu-low.c: Likewise. * utils.c: Likewise.
936 lines
24 KiB
C
936 lines
24 KiB
C
/* Functions specific to running gdb native on IA-64 running
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GNU/Linux.
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Copyright (C) 1999-2014 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "target.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "ia64-tdep.h"
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#include "linux-nat.h"
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#include <signal.h>
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#include <sys/ptrace.h>
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#include "gdb_wait.h"
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#ifdef HAVE_SYS_REG_H
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#include <sys/reg.h>
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#endif
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#include <sys/syscall.h>
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#include <sys/user.h>
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#include <asm/ptrace_offsets.h>
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#include <sys/procfs.h>
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/* Prototypes for supply_gregset etc. */
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#include "gregset.h"
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/* These must match the order of the register names.
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Some sort of lookup table is needed because the offsets associated
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with the registers are all over the board. */
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static int u_offsets[] =
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{
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/* general registers */
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-1, /* gr0 not available; i.e, it's always zero. */
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PT_R1,
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PT_R2,
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PT_R3,
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PT_R4,
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PT_R5,
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PT_R6,
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PT_R7,
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PT_R8,
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PT_R9,
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PT_R10,
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PT_R11,
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PT_R12,
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PT_R13,
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PT_R14,
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PT_R15,
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PT_R16,
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PT_R17,
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PT_R18,
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PT_R19,
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PT_R20,
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PT_R21,
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PT_R22,
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PT_R23,
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PT_R24,
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PT_R25,
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PT_R26,
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PT_R27,
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PT_R28,
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PT_R29,
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PT_R30,
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PT_R31,
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/* gr32 through gr127 not directly available via the ptrace interface. */
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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/* Floating point registers */
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-1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0). */
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PT_F2,
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PT_F3,
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PT_F4,
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PT_F5,
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PT_F6,
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PT_F7,
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PT_F8,
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PT_F9,
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PT_F10,
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PT_F11,
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PT_F12,
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PT_F13,
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PT_F14,
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PT_F15,
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PT_F16,
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PT_F17,
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PT_F18,
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PT_F19,
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PT_F20,
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PT_F21,
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PT_F22,
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PT_F23,
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PT_F24,
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PT_F25,
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PT_F26,
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PT_F27,
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PT_F28,
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PT_F29,
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PT_F30,
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PT_F31,
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PT_F32,
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PT_F33,
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PT_F34,
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PT_F35,
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PT_F36,
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PT_F37,
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PT_F38,
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PT_F39,
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PT_F40,
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PT_F41,
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PT_F42,
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PT_F43,
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PT_F44,
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PT_F45,
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PT_F46,
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PT_F47,
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PT_F48,
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PT_F49,
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PT_F50,
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PT_F51,
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PT_F52,
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PT_F53,
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PT_F54,
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PT_F55,
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PT_F56,
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PT_F57,
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PT_F58,
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PT_F59,
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PT_F60,
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PT_F61,
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PT_F62,
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PT_F63,
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PT_F64,
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PT_F65,
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PT_F66,
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PT_F67,
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PT_F68,
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PT_F69,
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PT_F70,
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PT_F71,
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PT_F72,
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PT_F73,
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PT_F74,
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PT_F75,
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PT_F76,
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PT_F77,
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PT_F78,
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PT_F79,
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PT_F80,
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PT_F81,
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PT_F82,
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PT_F83,
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PT_F84,
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PT_F85,
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PT_F86,
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PT_F87,
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PT_F88,
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PT_F89,
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PT_F90,
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PT_F91,
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PT_F92,
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PT_F93,
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PT_F94,
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PT_F95,
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PT_F96,
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PT_F97,
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PT_F98,
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PT_F99,
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PT_F100,
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PT_F101,
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PT_F102,
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PT_F103,
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PT_F104,
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PT_F105,
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PT_F106,
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PT_F107,
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PT_F108,
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PT_F109,
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PT_F110,
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PT_F111,
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PT_F112,
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PT_F113,
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PT_F114,
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PT_F115,
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PT_F116,
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PT_F117,
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PT_F118,
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PT_F119,
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PT_F120,
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PT_F121,
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PT_F122,
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PT_F123,
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PT_F124,
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PT_F125,
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PT_F126,
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PT_F127,
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/* Predicate registers - we don't fetch these individually. */
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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/* branch registers */
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PT_B0,
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PT_B1,
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PT_B2,
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PT_B3,
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PT_B4,
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PT_B5,
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PT_B6,
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PT_B7,
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/* Virtual frame pointer and virtual return address pointer. */
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-1, -1,
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/* other registers */
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PT_PR,
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PT_CR_IIP, /* ip */
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PT_CR_IPSR, /* psr */
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PT_CFM, /* cfm */
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/* kernel registers not visible via ptrace interface (?) */
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-1, -1, -1, -1, -1, -1, -1, -1,
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/* hole */
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-1, -1, -1, -1, -1, -1, -1, -1,
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PT_AR_RSC,
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PT_AR_BSP,
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PT_AR_BSPSTORE,
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PT_AR_RNAT,
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-1,
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-1, /* Not available: FCR, IA32 floating control register. */
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-1, -1,
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-1, /* Not available: EFLAG */
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-1, /* Not available: CSD */
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-1, /* Not available: SSD */
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-1, /* Not available: CFLG */
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-1, /* Not available: FSR */
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-1, /* Not available: FIR */
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-1, /* Not available: FDR */
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-1,
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PT_AR_CCV,
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-1, -1, -1,
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PT_AR_UNAT,
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-1, -1, -1,
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PT_AR_FPSR,
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-1, -1, -1,
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-1, /* Not available: ITC */
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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PT_AR_PFS,
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PT_AR_LC,
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PT_AR_EC,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1,
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/* nat bits - not fetched directly; instead we obtain these bits from
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either rnat or unat or from memory. */
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-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
-1, -1, -1, -1, -1, -1, -1, -1,
|
|
};
|
|
|
|
static CORE_ADDR
|
|
ia64_register_addr (struct gdbarch *gdbarch, int regno)
|
|
{
|
|
CORE_ADDR addr;
|
|
|
|
if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
|
|
error (_("Invalid register number %d."), regno);
|
|
|
|
if (u_offsets[regno] == -1)
|
|
addr = 0;
|
|
else
|
|
addr = (CORE_ADDR) u_offsets[regno];
|
|
|
|
return addr;
|
|
}
|
|
|
|
static int
|
|
ia64_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
|
|
{
|
|
return regno < 0
|
|
|| regno >= gdbarch_num_regs (gdbarch)
|
|
|| u_offsets[regno] == -1;
|
|
}
|
|
|
|
static int
|
|
ia64_cannot_store_register (struct gdbarch *gdbarch, int regno)
|
|
{
|
|
/* Rationale behind not permitting stores to bspstore...
|
|
|
|
The IA-64 architecture provides bspstore and bsp which refer
|
|
memory locations in the RSE's backing store. bspstore is the
|
|
next location which will be written when the RSE needs to write
|
|
to memory. bsp is the address at which r32 in the current frame
|
|
would be found if it were written to the backing store.
|
|
|
|
The IA-64 architecture provides read-only access to bsp and
|
|
read/write access to bspstore (but only when the RSE is in
|
|
the enforced lazy mode). It should be noted that stores
|
|
to bspstore also affect the value of bsp. Changing bspstore
|
|
does not affect the number of dirty entries between bspstore
|
|
and bsp, so changing bspstore by N words will also cause bsp
|
|
to be changed by (roughly) N as well. (It could be N-1 or N+1
|
|
depending upon where the NaT collection bits fall.)
|
|
|
|
OTOH, the Linux kernel provides read/write access to bsp (and
|
|
currently read/write access to bspstore as well). But it
|
|
is definitely the case that if you change one, the other
|
|
will change at the same time. It is more useful to gdb to
|
|
be able to change bsp. So in order to prevent strange and
|
|
undesirable things from happening when a dummy stack frame
|
|
is popped (after calling an inferior function), we allow
|
|
bspstore to be read, but not written. (Note that popping
|
|
a (generic) dummy stack frame causes all registers that
|
|
were previously read from the inferior process to be written
|
|
back.) */
|
|
|
|
return regno < 0
|
|
|| regno >= gdbarch_num_regs (gdbarch)
|
|
|| u_offsets[regno] == -1
|
|
|| regno == IA64_BSPSTORE_REGNUM;
|
|
}
|
|
|
|
void
|
|
supply_gregset (struct regcache *regcache, const gregset_t *gregsetp)
|
|
{
|
|
int regi;
|
|
const greg_t *regp = (const greg_t *) gregsetp;
|
|
|
|
for (regi = IA64_GR0_REGNUM; regi <= IA64_GR31_REGNUM; regi++)
|
|
{
|
|
regcache_raw_supply (regcache, regi, regp + (regi - IA64_GR0_REGNUM));
|
|
}
|
|
|
|
/* FIXME: NAT collection bits are at index 32; gotta deal with these
|
|
somehow... */
|
|
|
|
regcache_raw_supply (regcache, IA64_PR_REGNUM, regp + 33);
|
|
|
|
for (regi = IA64_BR0_REGNUM; regi <= IA64_BR7_REGNUM; regi++)
|
|
{
|
|
regcache_raw_supply (regcache, regi,
|
|
regp + 34 + (regi - IA64_BR0_REGNUM));
|
|
}
|
|
|
|
regcache_raw_supply (regcache, IA64_IP_REGNUM, regp + 42);
|
|
regcache_raw_supply (regcache, IA64_CFM_REGNUM, regp + 43);
|
|
regcache_raw_supply (regcache, IA64_PSR_REGNUM, regp + 44);
|
|
regcache_raw_supply (regcache, IA64_RSC_REGNUM, regp + 45);
|
|
regcache_raw_supply (regcache, IA64_BSP_REGNUM, regp + 46);
|
|
regcache_raw_supply (regcache, IA64_BSPSTORE_REGNUM, regp + 47);
|
|
regcache_raw_supply (regcache, IA64_RNAT_REGNUM, regp + 48);
|
|
regcache_raw_supply (regcache, IA64_CCV_REGNUM, regp + 49);
|
|
regcache_raw_supply (regcache, IA64_UNAT_REGNUM, regp + 50);
|
|
regcache_raw_supply (regcache, IA64_FPSR_REGNUM, regp + 51);
|
|
regcache_raw_supply (regcache, IA64_PFS_REGNUM, regp + 52);
|
|
regcache_raw_supply (regcache, IA64_LC_REGNUM, regp + 53);
|
|
regcache_raw_supply (regcache, IA64_EC_REGNUM, regp + 54);
|
|
}
|
|
|
|
void
|
|
fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno)
|
|
{
|
|
int regi;
|
|
greg_t *regp = (greg_t *) gregsetp;
|
|
|
|
#define COPY_REG(_idx_,_regi_) \
|
|
if ((regno == -1) || regno == _regi_) \
|
|
regcache_raw_collect (regcache, _regi_, regp + _idx_)
|
|
|
|
for (regi = IA64_GR0_REGNUM; regi <= IA64_GR31_REGNUM; regi++)
|
|
{
|
|
COPY_REG (regi - IA64_GR0_REGNUM, regi);
|
|
}
|
|
|
|
/* FIXME: NAT collection bits at index 32? */
|
|
|
|
COPY_REG (33, IA64_PR_REGNUM);
|
|
|
|
for (regi = IA64_BR0_REGNUM; regi <= IA64_BR7_REGNUM; regi++)
|
|
{
|
|
COPY_REG (34 + (regi - IA64_BR0_REGNUM), regi);
|
|
}
|
|
|
|
COPY_REG (42, IA64_IP_REGNUM);
|
|
COPY_REG (43, IA64_CFM_REGNUM);
|
|
COPY_REG (44, IA64_PSR_REGNUM);
|
|
COPY_REG (45, IA64_RSC_REGNUM);
|
|
COPY_REG (46, IA64_BSP_REGNUM);
|
|
COPY_REG (47, IA64_BSPSTORE_REGNUM);
|
|
COPY_REG (48, IA64_RNAT_REGNUM);
|
|
COPY_REG (49, IA64_CCV_REGNUM);
|
|
COPY_REG (50, IA64_UNAT_REGNUM);
|
|
COPY_REG (51, IA64_FPSR_REGNUM);
|
|
COPY_REG (52, IA64_PFS_REGNUM);
|
|
COPY_REG (53, IA64_LC_REGNUM);
|
|
COPY_REG (54, IA64_EC_REGNUM);
|
|
}
|
|
|
|
/* Given a pointer to a floating point register set in /proc format
|
|
(fpregset_t *), unpack the register contents and supply them as gdb's
|
|
idea of the current floating point register values. */
|
|
|
|
void
|
|
supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
|
|
{
|
|
int regi;
|
|
const char *from;
|
|
const gdb_byte f_zero[16] = { 0 };
|
|
const gdb_byte f_one[16] =
|
|
{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
|
|
|
|
/* Kernel generated cores have fr1==0 instead of 1.0. Older GDBs
|
|
did the same. So ignore whatever might be recorded in fpregset_t
|
|
for fr0/fr1 and always supply their expected values. */
|
|
|
|
/* fr0 is always read as zero. */
|
|
regcache_raw_supply (regcache, IA64_FR0_REGNUM, f_zero);
|
|
/* fr1 is always read as one (1.0). */
|
|
regcache_raw_supply (regcache, IA64_FR1_REGNUM, f_one);
|
|
|
|
for (regi = IA64_FR2_REGNUM; regi <= IA64_FR127_REGNUM; regi++)
|
|
{
|
|
from = (const char *) &((*fpregsetp)[regi - IA64_FR0_REGNUM]);
|
|
regcache_raw_supply (regcache, regi, from);
|
|
}
|
|
}
|
|
|
|
/* Given a pointer to a floating point register set in /proc format
|
|
(fpregset_t *), update the register specified by REGNO from gdb's idea
|
|
of the current floating point register set. If REGNO is -1, update
|
|
them all. */
|
|
|
|
void
|
|
fill_fpregset (const struct regcache *regcache,
|
|
fpregset_t *fpregsetp, int regno)
|
|
{
|
|
int regi;
|
|
|
|
for (regi = IA64_FR0_REGNUM; regi <= IA64_FR127_REGNUM; regi++)
|
|
{
|
|
if ((regno == -1) || (regno == regi))
|
|
regcache_raw_collect (regcache, regi,
|
|
&((*fpregsetp)[regi - IA64_FR0_REGNUM]));
|
|
}
|
|
}
|
|
|
|
#define IA64_PSR_DB (1UL << 24)
|
|
#define IA64_PSR_DD (1UL << 39)
|
|
|
|
static void
|
|
enable_watchpoints_in_psr (ptid_t ptid)
|
|
{
|
|
struct regcache *regcache = get_thread_regcache (ptid);
|
|
ULONGEST psr;
|
|
|
|
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
|
|
if (!(psr & IA64_PSR_DB))
|
|
{
|
|
psr |= IA64_PSR_DB; /* Set the db bit - this enables hardware
|
|
watchpoints and breakpoints. */
|
|
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
|
|
}
|
|
}
|
|
|
|
static long debug_registers[8];
|
|
|
|
static void
|
|
store_debug_register (ptid_t ptid, int idx, long val)
|
|
{
|
|
int tid;
|
|
|
|
tid = ptid_get_lwp (ptid);
|
|
if (tid == 0)
|
|
tid = ptid_get_pid (ptid);
|
|
|
|
(void) ptrace (PT_WRITE_U, tid, (PTRACE_TYPE_ARG3) (PT_DBR + 8 * idx), val);
|
|
}
|
|
|
|
static void
|
|
store_debug_register_pair (ptid_t ptid, int idx, long *dbr_addr,
|
|
long *dbr_mask)
|
|
{
|
|
if (dbr_addr)
|
|
store_debug_register (ptid, 2 * idx, *dbr_addr);
|
|
if (dbr_mask)
|
|
store_debug_register (ptid, 2 * idx + 1, *dbr_mask);
|
|
}
|
|
|
|
static int
|
|
is_power_of_2 (int val)
|
|
{
|
|
int i, onecount;
|
|
|
|
onecount = 0;
|
|
for (i = 0; i < 8 * sizeof (val); i++)
|
|
if (val & (1 << i))
|
|
onecount++;
|
|
|
|
return onecount <= 1;
|
|
}
|
|
|
|
static int
|
|
ia64_linux_insert_watchpoint (struct target_ops *self,
|
|
CORE_ADDR addr, int len, int rw,
|
|
struct expression *cond)
|
|
{
|
|
struct lwp_info *lp;
|
|
int idx;
|
|
long dbr_addr, dbr_mask;
|
|
int max_watchpoints = 4;
|
|
|
|
if (len <= 0 || !is_power_of_2 (len))
|
|
return -1;
|
|
|
|
for (idx = 0; idx < max_watchpoints; idx++)
|
|
{
|
|
dbr_mask = debug_registers[idx * 2 + 1];
|
|
if ((dbr_mask & (0x3UL << 62)) == 0)
|
|
{
|
|
/* Exit loop if both r and w bits clear. */
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (idx == max_watchpoints)
|
|
return -1;
|
|
|
|
dbr_addr = (long) addr;
|
|
dbr_mask = (~(len - 1) & 0x00ffffffffffffffL); /* construct mask to match */
|
|
dbr_mask |= 0x0800000000000000L; /* Only match privilege level 3 */
|
|
switch (rw)
|
|
{
|
|
case hw_write:
|
|
dbr_mask |= (1L << 62); /* Set w bit */
|
|
break;
|
|
case hw_read:
|
|
dbr_mask |= (1L << 63); /* Set r bit */
|
|
break;
|
|
case hw_access:
|
|
dbr_mask |= (3L << 62); /* Set both r and w bits */
|
|
break;
|
|
default:
|
|
return -1;
|
|
}
|
|
|
|
debug_registers[2 * idx] = dbr_addr;
|
|
debug_registers[2 * idx + 1] = dbr_mask;
|
|
ALL_LWPS (lp)
|
|
{
|
|
store_debug_register_pair (lp->ptid, idx, &dbr_addr, &dbr_mask);
|
|
enable_watchpoints_in_psr (lp->ptid);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
ia64_linux_remove_watchpoint (struct target_ops *self,
|
|
CORE_ADDR addr, int len, int type,
|
|
struct expression *cond)
|
|
{
|
|
int idx;
|
|
long dbr_addr, dbr_mask;
|
|
int max_watchpoints = 4;
|
|
|
|
if (len <= 0 || !is_power_of_2 (len))
|
|
return -1;
|
|
|
|
for (idx = 0; idx < max_watchpoints; idx++)
|
|
{
|
|
dbr_addr = debug_registers[2 * idx];
|
|
dbr_mask = debug_registers[2 * idx + 1];
|
|
if ((dbr_mask & (0x3UL << 62)) && addr == (CORE_ADDR) dbr_addr)
|
|
{
|
|
struct lwp_info *lp;
|
|
|
|
debug_registers[2 * idx] = 0;
|
|
debug_registers[2 * idx + 1] = 0;
|
|
dbr_addr = 0;
|
|
dbr_mask = 0;
|
|
|
|
ALL_LWPS (lp)
|
|
store_debug_register_pair (lp->ptid, idx, &dbr_addr, &dbr_mask);
|
|
|
|
return 0;
|
|
}
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
static void
|
|
ia64_linux_new_thread (struct lwp_info *lp)
|
|
{
|
|
int i, any;
|
|
|
|
any = 0;
|
|
for (i = 0; i < 8; i++)
|
|
{
|
|
if (debug_registers[i] != 0)
|
|
any = 1;
|
|
store_debug_register (lp->ptid, i, debug_registers[i]);
|
|
}
|
|
|
|
if (any)
|
|
enable_watchpoints_in_psr (lp->ptid);
|
|
}
|
|
|
|
static int
|
|
ia64_linux_stopped_data_address (struct target_ops *ops, CORE_ADDR *addr_p)
|
|
{
|
|
CORE_ADDR psr;
|
|
siginfo_t siginfo;
|
|
struct regcache *regcache = get_current_regcache ();
|
|
|
|
if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
|
|
return 0;
|
|
|
|
if (siginfo.si_signo != SIGTRAP
|
|
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
|
|
return 0;
|
|
|
|
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
|
|
psr |= IA64_PSR_DD; /* Set the dd bit - this will disable the watchpoint
|
|
for the next instruction. */
|
|
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
|
|
|
|
*addr_p = (CORE_ADDR) siginfo.si_addr;
|
|
return 1;
|
|
}
|
|
|
|
static int
|
|
ia64_linux_stopped_by_watchpoint (struct target_ops *ops)
|
|
{
|
|
CORE_ADDR addr;
|
|
return ia64_linux_stopped_data_address (ops, &addr);
|
|
}
|
|
|
|
static int
|
|
ia64_linux_can_use_hw_breakpoint (struct target_ops *self,
|
|
int type, int cnt, int othertype)
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
|
|
/* Fetch register REGNUM from the inferior. */
|
|
|
|
static void
|
|
ia64_linux_fetch_register (struct regcache *regcache, int regnum)
|
|
{
|
|
struct gdbarch *gdbarch = get_regcache_arch (regcache);
|
|
CORE_ADDR addr;
|
|
size_t size;
|
|
PTRACE_TYPE_RET *buf;
|
|
int pid, i;
|
|
|
|
/* r0 cannot be fetched but is always zero. */
|
|
if (regnum == IA64_GR0_REGNUM)
|
|
{
|
|
const gdb_byte zero[8] = { 0 };
|
|
|
|
gdb_assert (sizeof (zero) == register_size (gdbarch, regnum));
|
|
regcache_raw_supply (regcache, regnum, zero);
|
|
return;
|
|
}
|
|
|
|
/* fr0 cannot be fetched but is always zero. */
|
|
if (regnum == IA64_FR0_REGNUM)
|
|
{
|
|
const gdb_byte f_zero[16] = { 0 };
|
|
|
|
gdb_assert (sizeof (f_zero) == register_size (gdbarch, regnum));
|
|
regcache_raw_supply (regcache, regnum, f_zero);
|
|
return;
|
|
}
|
|
|
|
/* fr1 cannot be fetched but is always one (1.0). */
|
|
if (regnum == IA64_FR1_REGNUM)
|
|
{
|
|
const gdb_byte f_one[16] =
|
|
{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
|
|
|
|
gdb_assert (sizeof (f_one) == register_size (gdbarch, regnum));
|
|
regcache_raw_supply (regcache, regnum, f_one);
|
|
return;
|
|
}
|
|
|
|
if (ia64_cannot_fetch_register (gdbarch, regnum))
|
|
{
|
|
regcache_raw_supply (regcache, regnum, NULL);
|
|
return;
|
|
}
|
|
|
|
/* Cater for systems like GNU/Linux, that implement threads as
|
|
separate processes. */
|
|
pid = ptid_get_lwp (inferior_ptid);
|
|
if (pid == 0)
|
|
pid = ptid_get_pid (inferior_ptid);
|
|
|
|
/* This isn't really an address, but ptrace thinks of it as one. */
|
|
addr = ia64_register_addr (gdbarch, regnum);
|
|
size = register_size (gdbarch, regnum);
|
|
|
|
gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
|
|
buf = alloca (size);
|
|
|
|
/* Read the register contents from the inferior a chunk at a time. */
|
|
for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
|
|
{
|
|
errno = 0;
|
|
buf[i] = ptrace (PT_READ_U, pid, (PTRACE_TYPE_ARG3)addr, 0);
|
|
if (errno != 0)
|
|
error (_("Couldn't read register %s (#%d): %s."),
|
|
gdbarch_register_name (gdbarch, regnum),
|
|
regnum, safe_strerror (errno));
|
|
|
|
addr += sizeof (PTRACE_TYPE_RET);
|
|
}
|
|
regcache_raw_supply (regcache, regnum, buf);
|
|
}
|
|
|
|
/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
|
|
for all registers. */
|
|
|
|
static void
|
|
ia64_linux_fetch_registers (struct target_ops *ops,
|
|
struct regcache *regcache, int regnum)
|
|
{
|
|
if (regnum == -1)
|
|
for (regnum = 0;
|
|
regnum < gdbarch_num_regs (get_regcache_arch (regcache));
|
|
regnum++)
|
|
ia64_linux_fetch_register (regcache, regnum);
|
|
else
|
|
ia64_linux_fetch_register (regcache, regnum);
|
|
}
|
|
|
|
/* Store register REGNUM into the inferior. */
|
|
|
|
static void
|
|
ia64_linux_store_register (const struct regcache *regcache, int regnum)
|
|
{
|
|
struct gdbarch *gdbarch = get_regcache_arch (regcache);
|
|
CORE_ADDR addr;
|
|
size_t size;
|
|
PTRACE_TYPE_RET *buf;
|
|
int pid, i;
|
|
|
|
if (ia64_cannot_store_register (gdbarch, regnum))
|
|
return;
|
|
|
|
/* Cater for systems like GNU/Linux, that implement threads as
|
|
separate processes. */
|
|
pid = ptid_get_lwp (inferior_ptid);
|
|
if (pid == 0)
|
|
pid = ptid_get_pid (inferior_ptid);
|
|
|
|
/* This isn't really an address, but ptrace thinks of it as one. */
|
|
addr = ia64_register_addr (gdbarch, regnum);
|
|
size = register_size (gdbarch, regnum);
|
|
|
|
gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
|
|
buf = alloca (size);
|
|
|
|
/* Write the register contents into the inferior a chunk at a time. */
|
|
regcache_raw_collect (regcache, regnum, buf);
|
|
for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
|
|
{
|
|
errno = 0;
|
|
ptrace (PT_WRITE_U, pid, (PTRACE_TYPE_ARG3)addr, buf[i]);
|
|
if (errno != 0)
|
|
error (_("Couldn't write register %s (#%d): %s."),
|
|
gdbarch_register_name (gdbarch, regnum),
|
|
regnum, safe_strerror (errno));
|
|
|
|
addr += sizeof (PTRACE_TYPE_RET);
|
|
}
|
|
}
|
|
|
|
/* Store register REGNUM back into the inferior. If REGNUM is -1, do
|
|
this for all registers. */
|
|
|
|
static void
|
|
ia64_linux_store_registers (struct target_ops *ops,
|
|
struct regcache *regcache, int regnum)
|
|
{
|
|
if (regnum == -1)
|
|
for (regnum = 0;
|
|
regnum < gdbarch_num_regs (get_regcache_arch (regcache));
|
|
regnum++)
|
|
ia64_linux_store_register (regcache, regnum);
|
|
else
|
|
ia64_linux_store_register (regcache, regnum);
|
|
}
|
|
|
|
|
|
static target_xfer_partial_ftype *super_xfer_partial;
|
|
|
|
/* Implement the to_xfer_partial target_ops method. */
|
|
|
|
static enum target_xfer_status
|
|
ia64_linux_xfer_partial (struct target_ops *ops,
|
|
enum target_object object,
|
|
const char *annex,
|
|
gdb_byte *readbuf, const gdb_byte *writebuf,
|
|
ULONGEST offset, ULONGEST len,
|
|
ULONGEST *xfered_len)
|
|
{
|
|
if (object == TARGET_OBJECT_UNWIND_TABLE && readbuf != NULL)
|
|
{
|
|
static long gate_table_size;
|
|
gdb_byte *tmp_buf;
|
|
long res;
|
|
|
|
/* Probe for the table size once. */
|
|
if (gate_table_size == 0)
|
|
gate_table_size = syscall (__NR_getunwind, NULL, 0);
|
|
if (gate_table_size < 0)
|
|
return TARGET_XFER_E_IO;
|
|
|
|
if (offset >= gate_table_size)
|
|
return TARGET_XFER_EOF;
|
|
|
|
tmp_buf = alloca (gate_table_size);
|
|
res = syscall (__NR_getunwind, tmp_buf, gate_table_size);
|
|
if (res < 0)
|
|
return TARGET_XFER_E_IO;
|
|
gdb_assert (res == gate_table_size);
|
|
|
|
if (offset + len > gate_table_size)
|
|
len = gate_table_size - offset;
|
|
|
|
memcpy (readbuf, tmp_buf + offset, len);
|
|
*xfered_len = len;
|
|
return TARGET_XFER_OK;
|
|
}
|
|
|
|
return super_xfer_partial (ops, object, annex, readbuf, writebuf,
|
|
offset, len, xfered_len);
|
|
}
|
|
|
|
/* For break.b instruction ia64 CPU forgets the immediate value and generates
|
|
SIGILL with ILL_ILLOPC instead of more common SIGTRAP with TRAP_BRKPT.
|
|
ia64 does not use gdbarch_decr_pc_after_break so we do not have to make any
|
|
difference for the signals here. */
|
|
|
|
static int
|
|
ia64_linux_status_is_event (int status)
|
|
{
|
|
return WIFSTOPPED (status) && (WSTOPSIG (status) == SIGTRAP
|
|
|| WSTOPSIG (status) == SIGILL);
|
|
}
|
|
|
|
void _initialize_ia64_linux_nat (void);
|
|
|
|
void
|
|
_initialize_ia64_linux_nat (void)
|
|
{
|
|
struct target_ops *t;
|
|
|
|
/* Fill in the generic GNU/Linux methods. */
|
|
t = linux_target ();
|
|
|
|
/* Override the default fetch/store register routines. */
|
|
t->to_fetch_registers = ia64_linux_fetch_registers;
|
|
t->to_store_registers = ia64_linux_store_registers;
|
|
|
|
/* Override the default to_xfer_partial. */
|
|
super_xfer_partial = t->to_xfer_partial;
|
|
t->to_xfer_partial = ia64_linux_xfer_partial;
|
|
|
|
/* Override watchpoint routines. */
|
|
|
|
/* The IA-64 architecture can step over a watch point (without triggering
|
|
it again) if the "dd" (data debug fault disable) bit in the processor
|
|
status word is set.
|
|
|
|
This PSR bit is set in ia64_linux_stopped_by_watchpoint when the
|
|
code there has determined that a hardware watchpoint has indeed
|
|
been hit. The CPU will then be able to execute one instruction
|
|
without triggering a watchpoint. */
|
|
|
|
t->to_have_steppable_watchpoint = 1;
|
|
t->to_can_use_hw_breakpoint = ia64_linux_can_use_hw_breakpoint;
|
|
t->to_stopped_by_watchpoint = ia64_linux_stopped_by_watchpoint;
|
|
t->to_stopped_data_address = ia64_linux_stopped_data_address;
|
|
t->to_insert_watchpoint = ia64_linux_insert_watchpoint;
|
|
t->to_remove_watchpoint = ia64_linux_remove_watchpoint;
|
|
|
|
/* Register the target. */
|
|
linux_nat_add_target (t);
|
|
linux_nat_set_new_thread (t, ia64_linux_new_thread);
|
|
linux_nat_set_status_is_event (t, ia64_linux_status_is_event);
|
|
}
|