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2_10-branch'. Sprout from cygnus 2000-02-22 16:18:13 UTC Ian Lance Taylor <ian@airs.com> 'import libiberty from egcs' Cherrypick from master 2000-04-02 08:24:54 UTC Richard Henderson <rth@redhat.com> ' * config/tc-d30v.c (check_range): Allow signed or unsigned 32-bit': ChangeLog Makefile.in bfd/ChangeLog bfd/Makefile.am bfd/Makefile.in bfd/acinclude.m4 bfd/aclocal.m4 bfd/aix386-core.c bfd/aout-adobe.c bfd/aout-arm.c bfd/aout-ns32k.c bfd/aout-target.h bfd/aout-tic30.c bfd/aoutx.h bfd/archive.c bfd/archures.c bfd/armnetbsd.c bfd/bfd-in.h bfd/bfd-in2.h bfd/bfd.c bfd/binary.c bfd/bout.c bfd/cisco-core.c bfd/coff-a29k.c bfd/coff-alpha.c bfd/coff-apollo.c bfd/coff-arm.c bfd/coff-go32.c bfd/coff-h8300.c bfd/coff-h8500.c bfd/coff-i386.c bfd/coff-i860.c bfd/coff-i960.c bfd/coff-m68k.c bfd/coff-m88k.c bfd/coff-mcore.c bfd/coff-mips.c bfd/coff-ppc.c bfd/coff-rs6000.c bfd/coff-sh.c bfd/coff-sparc.c bfd/coff-stgo32.c bfd/coff-tic30.c bfd/coff-tic80.c bfd/coff-w65.c bfd/coff-we32k.c bfd/coff-z8k.c bfd/coffcode.h bfd/coffgen.c bfd/cofflink.c bfd/coffswap.h bfd/config.bfd bfd/config.in bfd/configure bfd/configure.host bfd/configure.in bfd/cpu-arm.c bfd/cpu-avr.c bfd/cpu-d10v.c bfd/cpu-h8500.c bfd/cpu-hppa.c bfd/cpu-i370.c bfd/cpu-m10300.c bfd/cpu-m32r.c bfd/cpu-mcore.c bfd/cpu-ns32k.c bfd/cpu-pj.c bfd/cpu-sh.c bfd/cpu-w65.c bfd/doc/Makefile.in bfd/dwarf1.c bfd/dwarf2.c bfd/ecoff.c bfd/ecofflink.c bfd/elf-bfd.h bfd/elf-hppa.h bfd/elf-m10200.c bfd/elf-m10300.c bfd/elf.c bfd/elf32-arc.c bfd/elf32-arm.h bfd/elf32-avr.c bfd/elf32-d10v.c bfd/elf32-d30v.c bfd/elf32-fr30.c bfd/elf32-gen.c bfd/elf32-hppa.c bfd/elf32-hppa.h bfd/elf32-i370.c bfd/elf32-i386.c bfd/elf32-i860.c bfd/elf32-i960.c bfd/elf32-m32r.c bfd/elf32-m68k.c bfd/elf32-m88k.c bfd/elf32-mcore.c bfd/elf32-mips.c bfd/elf32-pj.c bfd/elf32-ppc.c bfd/elf32-sh.c bfd/elf32-sparc.c bfd/elf32-v850.c bfd/elf64-alpha.c bfd/elf64-gen.c bfd/elf64-mips.c bfd/elf64-sparc.c bfd/elfarm-nabi.c bfd/elfarm-oabi.c bfd/elfcode.h bfd/elflink.c bfd/elflink.h bfd/elfxx-target.h bfd/epoc-pe-arm.c bfd/epoc-pei-arm.c bfd/freebsd.h bfd/hash.c bfd/hosts/alphalinux.h bfd/hp300hpux.c bfd/hppabsd-core.c bfd/hpux-core.c bfd/i386linux.c bfd/i386lynx.c bfd/i386msdos.c bfd/i386os9k.c bfd/ieee.c bfd/ihex.c bfd/irix-core.c bfd/libbfd-in.h bfd/libbfd.c bfd/libbfd.h bfd/libcoff-in.h bfd/libcoff.h bfd/libecoff.h bfd/libhppa.h bfd/libpei.h bfd/linker.c bfd/m68klinux.c bfd/mipsbsd.c bfd/netbsd-core.c bfd/netbsd.h bfd/nlm-target.h bfd/nlm32-ppc.c bfd/nlm32-sparc.c bfd/nlmcode.h bfd/oasys.c bfd/osf-core.c bfd/pc532-mach.c bfd/pe-arm.c bfd/pe-i386.c bfd/pe-mips.c bfd/pe-ppc.c bfd/pe-sh.c bfd/pei-arm.c bfd/pei-i386.c bfd/pei-mcore.c bfd/pei-mips.c bfd/pei-ppc.c bfd/pei-sh.c bfd/peicode.h bfd/peigen.c bfd/po/POTFILES.in bfd/po/bfd.pot bfd/ppcboot.c bfd/ptrace-core.c bfd/reloc.c bfd/reloc16.c bfd/riscix.c bfd/rs6000-core.c bfd/sco5-core.c bfd/section.c bfd/som.c bfd/sparclinux.c bfd/srec.c bfd/stabs.c bfd/sunos.c bfd/syms.c bfd/targets.c bfd/tekhex.c bfd/trad-core.c bfd/versados.c bfd/vms-gsd.c bfd/vms-hdr.c bfd/vms-misc.c bfd/vms-tir.c bfd/vms.c bfd/vms.h bfd/xcofflink.c binutils/ChangeLog binutils/Makefile.am binutils/Makefile.in binutils/NEWS binutils/aclocal.m4 binutils/addr2line.c binutils/ar.1 binutils/ar.c binutils/arparse.y binutils/arsup.c binutils/binutils.texi binutils/config.in binutils/configure binutils/configure.in binutils/debug.c binutils/deflex.l binutils/defparse.y binutils/dlltool.c binutils/dllwrap.c binutils/dyn-string.c binutils/dyn-string.h binutils/filemode.c binutils/ieee.c binutils/nm.c binutils/objcopy.1 binutils/objcopy.c binutils/objdump.c binutils/po/POTFILES.in binutils/po/binutils.pot binutils/prdbg.c binutils/rclex.l binutils/rcparse.y binutils/rdcoff.c binutils/rddbg.c binutils/readelf.c binutils/rename.c binutils/rescoff.c binutils/resrc.c binutils/resres.c binutils/size.c binutils/stabs.c binutils/strings.1 binutils/strings.c binutils/testsuite/ChangeLog binutils/testsuite/binutils-all/hppa/freg.s binutils/testsuite/binutils-all/hppa/objdump.exp binutils/testsuite/binutils-all/objcopy.exp binutils/testsuite/binutils-all/objdump.exp binutils/testsuite/binutils-all/readelf.h binutils/testsuite/binutils-all/readelf.r binutils/testsuite/binutils-all/readelf.s binutils/testsuite/binutils-all/readelf.ss binutils/testsuite/binutils-all/readelf.wi binutils/testsuite/binutils-all/testprog.c binutils/windres.c binutils/windres.h binutils/wrstabs.c config.guess config.sub config/ChangeLog config/mh-i370pic config/mt-aix43 config/mt-i370pic config/mt-wince configure configure.in gas/ChangeLog gas/Makefile.am gas/Makefile.in gas/NEWS gas/aclocal.m4 gas/app.c gas/as.c gas/as.h gas/atof-generic.c gas/cgen.c gas/cond.c gas/config/atof-ieee.c gas/config/atof-vax.c gas/config/e-i386aout.c gas/config/m68k-parse.h gas/config/obj-aout.c gas/config/obj-aout.h gas/config/obj-bout.c gas/config/obj-coff.c gas/config/obj-coff.h gas/config/obj-ecoff.c gas/config/obj-ecoff.h gas/config/obj-elf.c gas/config/obj-elf.h gas/config/obj-evax.h gas/config/obj-multi.h gas/config/obj-som.c gas/config/obj-vms.h gas/config/tc-alpha.c gas/config/tc-alpha.h gas/config/tc-arc.c gas/config/tc-arc.h gas/config/tc-arm.c gas/config/tc-arm.h gas/config/tc-avr.c gas/config/tc-avr.h gas/config/tc-d10v.c gas/config/tc-d10v.h gas/config/tc-d30v.c gas/config/tc-d30v.h gas/config/tc-fr30.c gas/config/tc-h8300.c gas/config/tc-hppa.c gas/config/tc-hppa.h gas/config/tc-i370.c gas/config/tc-i370.h gas/config/tc-i386.c gas/config/tc-i386.h gas/config/tc-i860.c gas/config/tc-i960.c gas/config/tc-i960.h gas/config/tc-m32r.c gas/config/tc-m68k.c gas/config/tc-m68k.h gas/config/tc-m88k.c gas/config/tc-m88k.h gas/config/tc-mcore.c gas/config/tc-mcore.h gas/config/tc-mips.c gas/config/tc-mips.h gas/config/tc-mn10200.c gas/config/tc-mn10300.c gas/config/tc-ns32k.c gas/config/tc-ns32k.h gas/config/tc-pj.c gas/config/tc-pj.h gas/config/tc-ppc.c gas/config/tc-ppc.h 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include/coff/pe.h include/coff/sh.h include/dis-asm.h include/elf/ChangeLog include/elf/arm-oabi.h include/elf/arm.h include/elf/avr.h include/elf/common.h include/elf/dwarf.h include/elf/dwarf2.h include/elf/hppa.h include/elf/i370.h include/elf/i386.h include/elf/i960.h include/elf/m32r.h include/elf/m68k.h include/elf/mcore.h include/elf/mips.h include/elf/mn10300.h include/elf/pj.h include/elf/reloc-macros.h include/elf/sh.h include/elf/sparc.h include/hashtab.h include/hp-symtab.h include/opcode/ChangeLog include/opcode/alpha.h include/opcode/cgen.h include/opcode/d10v.h include/opcode/d30v.h include/opcode/hppa.h include/opcode/i370.h include/opcode/i386.h include/opcode/m68k.h include/opcode/mips.h include/opcode/mn10300.h include/opcode/pj.h include/opcode/ppc.h include/partition.h include/remote-sim.h include/sim-d10v.h ld/ChangeLog ld/Makefile.am ld/Makefile.in ld/NEWS ld/aclocal.m4 ld/config.in ld/configure ld/configure.host ld/configure.in ld/configure.tgt ld/deffile.h ld/deffilep.y ld/emulparams/arm_epoc_pe.sh ld/emulparams/armelf.sh ld/emulparams/armelf_linux.sh ld/emulparams/armelf_linux26.sh ld/emulparams/armelf_oabi.sh ld/emulparams/armnbsd.sh ld/emulparams/armpe.sh ld/emulparams/avr1200.sh ld/emulparams/avr23xx.sh ld/emulparams/avr4433.sh ld/emulparams/avr44x4.sh ld/emulparams/avr85xx.sh ld/emulparams/avrmega103.sh ld/emulparams/avrmega161.sh ld/emulparams/avrmega603.sh ld/emulparams/d10velf.sh ld/emulparams/elf32_i960.sh ld/emulparams/elf32bmipn32.sh ld/emulparams/elf32i370.sh ld/emulparams/elf32mcore.sh ld/emulparams/elf32ppc.sh ld/emulparams/elf32ppclinux.sh ld/emulparams/elf64_sparc.sh ld/emulparams/elf64bmip.sh ld/emulparams/elf64hppa.sh ld/emulparams/i386pe.sh ld/emulparams/i386pe_posix.sh ld/emulparams/mcorepe.sh ld/emulparams/mipspe.sh ld/emulparams/pjelf.sh ld/emulparams/pjlelf.sh ld/emulparams/ppcpe.sh ld/emulparams/shpe.sh ld/emultempl/aix.em ld/emultempl/armcoff.em ld/emultempl/armelf.em ld/emultempl/armelf_oabi.em ld/emultempl/astring.sed ld/emultempl/beos.em ld/emultempl/elf32.em ld/emultempl/generic.em ld/emultempl/gld960.em ld/emultempl/gld960c.em ld/emultempl/hppaelf.em ld/emultempl/linux.em ld/emultempl/lnk960.em ld/emultempl/mipsecoff.em ld/emultempl/ostring.sed ld/emultempl/pe.em ld/emultempl/sunos.em ld/emultempl/vanilla.em ld/genscripts.sh ld/ld.h ld/ld.texinfo ld/ldcref.c ld/ldemul.c ld/ldemul.h ld/ldexp.c ld/ldfile.c ld/ldfile.h ld/ldgram.y ld/ldlang.c ld/ldlang.h ld/ldmain.c ld/ldmisc.c ld/lexsup.c ld/mri.c ld/pe-dll.c ld/pe-dll.h ld/po/POTFILES.in ld/po/ld.pot ld/scripttempl/armcoff.sc ld/scripttempl/elf.sc ld/scripttempl/elf32avr.sc ld/scripttempl/elfd10v.sc ld/scripttempl/elfi370.sc ld/scripttempl/epocpe.sc ld/scripttempl/i386go32.sc ld/scripttempl/mcorepe.sc ld/scripttempl/pe.sc ld/scripttempl/pj.sc ld/scripttempl/v850.sc ld/testsuite/ChangeLog ld/testsuite/ld-cdtest/cdtest-foo.cc ld/testsuite/ld-cdtest/cdtest-main.cc ld/testsuite/ld-checks/asm.s ld/testsuite/ld-checks/checks.exp ld/testsuite/ld-elfvers/vers.exp ld/testsuite/ld-elfvers/vers1.c ld/testsuite/ld-elfvers/vers15.c ld/testsuite/ld-elfvers/vers17.c ld/testsuite/ld-elfvers/vers17.dsym ld/testsuite/ld-elfvers/vers17.map ld/testsuite/ld-elfvers/vers17.ver ld/testsuite/ld-elfvers/vers18.c ld/testsuite/ld-elfvers/vers18.dsym ld/testsuite/ld-elfvers/vers18.map ld/testsuite/ld-elfvers/vers18.sym ld/testsuite/ld-elfvers/vers18.ver ld/testsuite/ld-elfvers/vers19.c ld/testsuite/ld-elfvers/vers19.dsym ld/testsuite/ld-elfvers/vers19.ver ld/testsuite/ld-elfvers/vers2.c ld/testsuite/ld-elfvers/vers3.c ld/testsuite/ld-elfvers/vers4.c ld/testsuite/ld-elfvers/vers6.c ld/testsuite/ld-elfvers/vers7.c ld/testsuite/ld-elfvers/vers9.c ld/testsuite/ld-scripts/phdrs.exp ld/testsuite/ld-scripts/phdrs.t ld/testsuite/ld-scripts/script.exp ld/testsuite/ld-scripts/weak.exp ld/testsuite/ld-selective/selective.exp ld/testsuite/ld-shared/main.c ld/testsuite/ld-shared/sh1.c ld/testsuite/ld-shared/shared.exp ld/testsuite/ld-srec/sr3.cc ld/testsuite/ld-srec/srec.exp ld/testsuite/ld-undefined/undefined.exp ld/testsuite/lib/ld-lib.exp libiberty/ChangeLog libiberty/Makefile.in libiberty/argv.c libiberty/choose-temp.c libiberty/config.in libiberty/configure libiberty/configure.in libiberty/cplus-dem.c libiberty/floatformat.c libiberty/getruntime.c libiberty/hashtab.c libiberty/partition.c libiberty/pexecute.c libiberty/splay-tree.c libiberty/vasprintf.c libiberty/xmalloc.c ltconfig ltmain.sh mkdep opcodes/ChangeLog opcodes/Makefile.am opcodes/Makefile.in opcodes/aclocal.m4 opcodes/alpha-dis.c opcodes/alpha-opc.c opcodes/arm-dis.c opcodes/arm-opc.h opcodes/avr-dis.c opcodes/cgen-opc.c opcodes/configure opcodes/configure.in opcodes/d10v-opc.c opcodes/d30v-dis.c opcodes/d30v-opc.c opcodes/dis-buf.c opcodes/disassemble.c opcodes/fr30-asm.c opcodes/fr30-desc.h opcodes/fr30-dis.c opcodes/fr30-ibld.c opcodes/fr30-opc.c opcodes/hppa-dis.c opcodes/i370-dis.c opcodes/i370-opc.c opcodes/i386-dis.c opcodes/m10300-dis.c opcodes/m10300-opc.c opcodes/m32r-asm.c opcodes/m32r-desc.c opcodes/m32r-desc.h opcodes/m32r-dis.c opcodes/m32r-ibld.c opcodes/m32r-opc.c opcodes/m32r-opc.h opcodes/m32r-opinst.c opcodes/m68k-dis.c opcodes/m68k-opc.c opcodes/mcore-dis.c opcodes/mcore-opc.h opcodes/mips-dis.c opcodes/mips-opc.c opcodes/pj-dis.c opcodes/pj-opc.c opcodes/po/POTFILES.in opcodes/po/opcodes.pot opcodes/ppc-opc.c opcodes/sh-dis.c opcodes/sh-opc.h opcodes/sparc-dis.c opcodes/sparc-opc.c opcodes/tic30-dis.c texinfo/texinfo.tex Delete: bfd/configure.bat bfd/makefile.dos binutils/configure.bat config/mh-aix43 configure.bat gas/config/go32.cfg gas/config/te-multi.h gas/configure.bat gprof/configure.bat include/wait.h intl/ChangeLog.Cygnus ld/configure.bat ld/emulparams/go32.sh ld/emultempl/stringify.sed ld/scripttempl/go32coff.sc ld/testsuite/ld-selective/5.cc libiberty/configure.bat libiberty/makefile.dos makeall.bat opcodes/configure.bat
622 lines
16 KiB
C
622 lines
16 KiB
C
/* CGEN generic opcode support.
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Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "sysdep.h"
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#include <ctype.h>
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#include <stdio.h>
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#include "ansidecl.h"
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#include "libiberty.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "opcode/cgen.h"
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static unsigned int hash_keyword_name
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PARAMS ((const CGEN_KEYWORD *, const char *, int));
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static unsigned int hash_keyword_value
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PARAMS ((const CGEN_KEYWORD *, unsigned int));
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static void build_keyword_hash_tables
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PARAMS ((CGEN_KEYWORD *));
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/* Return number of hash table entries to use for N elements. */
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#define KEYWORD_HASH_SIZE(n) ((n) <= 31 ? 17 : 31)
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/* Look up *NAMEP in the keyword table KT.
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The result is the keyword entry or NULL if not found. */
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const CGEN_KEYWORD_ENTRY *
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cgen_keyword_lookup_name (kt, name)
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CGEN_KEYWORD *kt;
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const char *name;
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{
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const CGEN_KEYWORD_ENTRY *ke;
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const char *p,*n;
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if (kt->name_hash_table == NULL)
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build_keyword_hash_tables (kt);
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ke = kt->name_hash_table[hash_keyword_name (kt, name, 0)];
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/* We do case insensitive comparisons.
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If that ever becomes a problem, add an attribute that denotes
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"do case sensitive comparisons". */
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while (ke != NULL)
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{
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n = name;
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p = ke->name;
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while (*p
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&& (*p == *n
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|| (isalpha ((unsigned char) *p)
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&& (tolower ((unsigned char) *p)
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== tolower ((unsigned char) *n)))))
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++n, ++p;
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if (!*p && !*n)
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return ke;
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ke = ke->next_name;
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}
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if (kt->null_entry)
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return kt->null_entry;
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return NULL;
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}
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/* Look up VALUE in the keyword table KT.
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The result is the keyword entry or NULL if not found. */
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const CGEN_KEYWORD_ENTRY *
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cgen_keyword_lookup_value (kt, value)
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CGEN_KEYWORD *kt;
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int value;
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{
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const CGEN_KEYWORD_ENTRY *ke;
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if (kt->name_hash_table == NULL)
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build_keyword_hash_tables (kt);
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ke = kt->value_hash_table[hash_keyword_value (kt, value)];
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while (ke != NULL)
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{
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if (value == ke->value)
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return ke;
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ke = ke->next_value;
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}
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return NULL;
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}
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/* Add an entry to a keyword table. */
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void
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cgen_keyword_add (kt, ke)
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CGEN_KEYWORD *kt;
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CGEN_KEYWORD_ENTRY *ke;
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{
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unsigned int hash;
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if (kt->name_hash_table == NULL)
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build_keyword_hash_tables (kt);
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hash = hash_keyword_name (kt, ke->name, 0);
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ke->next_name = kt->name_hash_table[hash];
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kt->name_hash_table[hash] = ke;
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hash = hash_keyword_value (kt, ke->value);
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ke->next_value = kt->value_hash_table[hash];
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kt->value_hash_table[hash] = ke;
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if (ke->name[0] == 0)
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kt->null_entry = ke;
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}
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/* FIXME: Need function to return count of keywords. */
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/* Initialize a keyword table search.
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SPEC is a specification of what to search for.
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A value of NULL means to find every keyword.
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Currently NULL is the only acceptable value [further specification
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deferred].
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The result is an opaque data item used to record the search status.
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It is passed to each call to cgen_keyword_search_next. */
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CGEN_KEYWORD_SEARCH
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cgen_keyword_search_init (kt, spec)
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CGEN_KEYWORD *kt;
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const char *spec;
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{
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CGEN_KEYWORD_SEARCH search;
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/* FIXME: Need to specify format of PARAMS. */
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if (spec != NULL)
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abort ();
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if (kt->name_hash_table == NULL)
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build_keyword_hash_tables (kt);
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search.table = kt;
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search.spec = spec;
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search.current_hash = 0;
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search.current_entry = NULL;
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return search;
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}
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/* Return the next keyword specified by SEARCH.
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The result is the next entry or NULL if there are no more. */
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const CGEN_KEYWORD_ENTRY *
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cgen_keyword_search_next (search)
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CGEN_KEYWORD_SEARCH *search;
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{
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/* Has search finished? */
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if (search->current_hash == search->table->hash_table_size)
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return NULL;
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/* Search in progress? */
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if (search->current_entry != NULL
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/* Anything left on this hash chain? */
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&& search->current_entry->next_name != NULL)
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{
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search->current_entry = search->current_entry->next_name;
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return search->current_entry;
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}
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/* Move to next hash chain [unless we haven't started yet]. */
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if (search->current_entry != NULL)
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++search->current_hash;
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while (search->current_hash < search->table->hash_table_size)
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{
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search->current_entry = search->table->name_hash_table[search->current_hash];
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if (search->current_entry != NULL)
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return search->current_entry;
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++search->current_hash;
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}
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return NULL;
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}
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/* Return first entry in hash chain for NAME.
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If CASE_SENSITIVE_P is non-zero, return a case sensitive hash. */
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static unsigned int
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hash_keyword_name (kt, name, case_sensitive_p)
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const CGEN_KEYWORD *kt;
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const char *name;
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int case_sensitive_p;
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{
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unsigned int hash;
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if (case_sensitive_p)
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for (hash = 0; *name; ++name)
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hash = (hash * 97) + (unsigned char) *name;
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else
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for (hash = 0; *name; ++name)
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hash = (hash * 97) + (unsigned char) tolower (*name);
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return hash % kt->hash_table_size;
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}
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/* Return first entry in hash chain for VALUE. */
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static unsigned int
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hash_keyword_value (kt, value)
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const CGEN_KEYWORD *kt;
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unsigned int value;
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{
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return value % kt->hash_table_size;
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}
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/* Build a keyword table's hash tables.
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We probably needn't build the value hash table for the assembler when
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we're using the disassembler, but we keep things simple. */
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static void
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build_keyword_hash_tables (kt)
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CGEN_KEYWORD *kt;
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{
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int i;
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/* Use the number of compiled in entries as an estimate for the
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typical sized table [not too many added at runtime]. */
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unsigned int size = KEYWORD_HASH_SIZE (kt->num_init_entries);
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kt->hash_table_size = size;
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kt->name_hash_table = (CGEN_KEYWORD_ENTRY **)
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xmalloc (size * sizeof (CGEN_KEYWORD_ENTRY *));
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memset (kt->name_hash_table, 0, size * sizeof (CGEN_KEYWORD_ENTRY *));
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kt->value_hash_table = (CGEN_KEYWORD_ENTRY **)
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xmalloc (size * sizeof (CGEN_KEYWORD_ENTRY *));
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memset (kt->value_hash_table, 0, size * sizeof (CGEN_KEYWORD_ENTRY *));
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/* The table is scanned backwards as we want keywords appearing earlier to
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be prefered over later ones. */
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for (i = kt->num_init_entries - 1; i >= 0; --i)
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cgen_keyword_add (kt, &kt->init_entries[i]);
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}
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/* Hardware support. */
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/* Lookup a hardware element by its name.
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Returns NULL if NAME is not supported by the currently selected
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mach/isa. */
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const CGEN_HW_ENTRY *
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cgen_hw_lookup_by_name (cd, name)
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CGEN_CPU_DESC cd;
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const char *name;
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{
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int i;
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const CGEN_HW_ENTRY **hw = cd->hw_table.entries;
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for (i = 0; i < cd->hw_table.num_entries; ++i)
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if (hw[i] && strcmp (name, hw[i]->name) == 0)
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return hw[i];
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return NULL;
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}
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/* Lookup a hardware element by its number.
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Hardware elements are enumerated, however it may be possible to add some
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at runtime, thus HWNUM is not an enum type but rather an int.
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Returns NULL if HWNUM is not supported by the currently selected mach. */
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const CGEN_HW_ENTRY *
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cgen_hw_lookup_by_num (cd, hwnum)
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CGEN_CPU_DESC cd;
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int hwnum;
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{
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int i;
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const CGEN_HW_ENTRY **hw = cd->hw_table.entries;
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/* ??? This can be speeded up. */
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for (i = 0; i < cd->hw_table.num_entries; ++i)
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if (hw[i] && hwnum == hw[i]->type)
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return hw[i];
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return NULL;
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}
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/* Operand support. */
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/* Lookup an operand by its name.
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Returns NULL if NAME is not supported by the currently selected
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mach/isa. */
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const CGEN_OPERAND *
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cgen_operand_lookup_by_name (cd, name)
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CGEN_CPU_DESC cd;
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const char *name;
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{
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int i;
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const CGEN_OPERAND **op = cd->operand_table.entries;
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for (i = 0; i < cd->operand_table.num_entries; ++i)
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if (op[i] && strcmp (name, op[i]->name) == 0)
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return op[i];
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return NULL;
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}
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/* Lookup an operand by its number.
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Operands are enumerated, however it may be possible to add some
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at runtime, thus OPNUM is not an enum type but rather an int.
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Returns NULL if OPNUM is not supported by the currently selected
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mach/isa. */
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const CGEN_OPERAND *
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cgen_operand_lookup_by_num (cd, opnum)
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CGEN_CPU_DESC cd;
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int opnum;
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{
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return cd->operand_table.entries[opnum];
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}
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/* Instruction support. */
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/* Return number of instructions. This includes any added at runtime. */
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int
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cgen_insn_count (cd)
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CGEN_CPU_DESC cd;
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{
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int count = cd->insn_table.num_init_entries;
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CGEN_INSN_LIST *rt_insns = cd->insn_table.new_entries;
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for ( ; rt_insns != NULL; rt_insns = rt_insns->next)
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++count;
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return count;
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}
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/* Return number of macro-instructions.
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This includes any added at runtime. */
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int
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cgen_macro_insn_count (cd)
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CGEN_CPU_DESC cd;
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{
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int count = cd->macro_insn_table.num_init_entries;
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CGEN_INSN_LIST *rt_insns = cd->macro_insn_table.new_entries;
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for ( ; rt_insns != NULL; rt_insns = rt_insns->next)
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++count;
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return count;
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}
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/* Cover function to read and properly byteswap an insn value. */
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CGEN_INSN_INT
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cgen_get_insn_value (cd, buf, length)
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CGEN_CPU_DESC cd;
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unsigned char *buf;
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int length;
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{
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CGEN_INSN_INT value;
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switch (length)
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{
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case 8:
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value = *buf;
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break;
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case 16:
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if (cd->insn_endian == CGEN_ENDIAN_BIG)
|
||
value = bfd_getb16 (buf);
|
||
else
|
||
value = bfd_getl16 (buf);
|
||
break;
|
||
case 32:
|
||
if (cd->insn_endian == CGEN_ENDIAN_BIG)
|
||
value = bfd_getb32 (buf);
|
||
else
|
||
value = bfd_getl32 (buf);
|
||
break;
|
||
default:
|
||
abort ();
|
||
}
|
||
|
||
return value;
|
||
}
|
||
|
||
/* Cover function to store an insn value properly byteswapped. */
|
||
|
||
void
|
||
cgen_put_insn_value (cd, buf, length, value)
|
||
CGEN_CPU_DESC cd;
|
||
unsigned char *buf;
|
||
int length;
|
||
CGEN_INSN_INT value;
|
||
{
|
||
switch (length)
|
||
{
|
||
case 8:
|
||
buf[0] = value;
|
||
break;
|
||
case 16:
|
||
if (cd->insn_endian == CGEN_ENDIAN_BIG)
|
||
bfd_putb16 (value, buf);
|
||
else
|
||
bfd_putl16 (value, buf);
|
||
break;
|
||
case 32:
|
||
if (cd->insn_endian == CGEN_ENDIAN_BIG)
|
||
bfd_putb32 (value, buf);
|
||
else
|
||
bfd_putl32 (value, buf);
|
||
break;
|
||
default:
|
||
abort ();
|
||
}
|
||
}
|
||
|
||
/* Look up instruction INSN_*_VALUE and extract its fields.
|
||
INSN_INT_VALUE is used if CGEN_INT_INSN_P.
|
||
Otherwise INSN_BYTES_VALUE is used.
|
||
INSN, if non-null, is the insn table entry.
|
||
Otherwise INSN_*_VALUE is examined to compute it.
|
||
LENGTH is the bit length of INSN_*_VALUE if known, otherwise 0.
|
||
0 is only valid if `insn == NULL && ! CGEN_INT_INSN_P'.
|
||
If INSN != NULL, LENGTH must be valid.
|
||
ALIAS_P is non-zero if alias insns are to be included in the search.
|
||
|
||
The result is a pointer to the insn table entry, or NULL if the instruction
|
||
wasn't recognized. */
|
||
|
||
/* ??? Will need to be revisited for VLIW architectures. */
|
||
|
||
const CGEN_INSN *
|
||
cgen_lookup_insn (cd, insn, insn_int_value, insn_bytes_value, length, fields,
|
||
alias_p)
|
||
CGEN_CPU_DESC cd;
|
||
const CGEN_INSN *insn;
|
||
CGEN_INSN_INT insn_int_value;
|
||
/* ??? CGEN_INSN_BYTES would be a nice type name to use here. */
|
||
unsigned char *insn_bytes_value;
|
||
int length;
|
||
CGEN_FIELDS *fields;
|
||
int alias_p;
|
||
{
|
||
unsigned char *buf;
|
||
CGEN_INSN_INT base_insn;
|
||
CGEN_EXTRACT_INFO ex_info;
|
||
CGEN_EXTRACT_INFO *info;
|
||
|
||
if (cd->int_insn_p)
|
||
{
|
||
info = NULL;
|
||
buf = (unsigned char *) alloca (cd->max_insn_bitsize / 8);
|
||
cgen_put_insn_value (cd, buf, length, insn_int_value);
|
||
base_insn = insn_int_value;
|
||
}
|
||
else
|
||
{
|
||
info = &ex_info;
|
||
ex_info.dis_info = NULL;
|
||
ex_info.insn_bytes = insn_bytes_value;
|
||
ex_info.valid = -1;
|
||
buf = insn_bytes_value;
|
||
base_insn = cgen_get_insn_value (cd, buf, length);
|
||
}
|
||
|
||
if (!insn)
|
||
{
|
||
const CGEN_INSN_LIST *insn_list;
|
||
|
||
/* The instructions are stored in hash lists.
|
||
Pick the first one and keep trying until we find the right one. */
|
||
|
||
insn_list = cgen_dis_lookup_insn (cd, buf, base_insn);
|
||
while (insn_list != NULL)
|
||
{
|
||
insn = insn_list->insn;
|
||
|
||
if (alias_p
|
||
/* FIXME: Ensure ALIAS attribute always has same index. */
|
||
|| ! CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ALIAS))
|
||
{
|
||
/* Basic bit mask must be correct. */
|
||
/* ??? May wish to allow target to defer this check until the
|
||
extract handler. */
|
||
if ((base_insn & CGEN_INSN_BASE_MASK (insn))
|
||
== CGEN_INSN_BASE_VALUE (insn))
|
||
{
|
||
/* ??? 0 is passed for `pc' */
|
||
int elength = CGEN_EXTRACT_FN (cd, insn)
|
||
(cd, insn, info, base_insn, fields, (bfd_vma) 0);
|
||
if (elength > 0)
|
||
{
|
||
/* sanity check */
|
||
if (length != 0 && length != elength)
|
||
abort ();
|
||
return insn;
|
||
}
|
||
}
|
||
}
|
||
|
||
insn_list = insn_list->next;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Sanity check: can't pass an alias insn if ! alias_p. */
|
||
if (! alias_p
|
||
&& CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ALIAS))
|
||
abort ();
|
||
/* Sanity check: length must be correct. */
|
||
if (length != CGEN_INSN_BITSIZE (insn))
|
||
abort ();
|
||
|
||
/* ??? 0 is passed for `pc' */
|
||
length = CGEN_EXTRACT_FN (cd, insn)
|
||
(cd, insn, info, base_insn, fields, (bfd_vma) 0);
|
||
/* Sanity check: must succeed.
|
||
Could relax this later if it ever proves useful. */
|
||
if (length == 0)
|
||
abort ();
|
||
return insn;
|
||
}
|
||
|
||
return NULL;
|
||
}
|
||
|
||
/* Fill in the operand instances used by INSN whose operands are FIELDS.
|
||
INDICES is a pointer to a buffer of MAX_OPERAND_INSTANCES ints to be filled
|
||
in. */
|
||
|
||
void
|
||
cgen_get_insn_operands (cd, insn, fields, indices)
|
||
CGEN_CPU_DESC cd;
|
||
const CGEN_INSN *insn;
|
||
const CGEN_FIELDS *fields;
|
||
int *indices;
|
||
{
|
||
const CGEN_OPINST *opinst;
|
||
int i;
|
||
|
||
if (insn->opinst == NULL)
|
||
abort ();
|
||
for (i = 0, opinst = insn->opinst; opinst->type != CGEN_OPINST_END; ++i, ++opinst)
|
||
{
|
||
enum cgen_operand_type op_type = opinst->op_type;
|
||
if (op_type == CGEN_OPERAND_NIL)
|
||
indices[i] = opinst->index;
|
||
else
|
||
indices[i] = (*cd->get_int_operand) (cd, op_type, fields);
|
||
}
|
||
}
|
||
|
||
/* Cover function to cgen_get_insn_operands when either INSN or FIELDS
|
||
isn't known.
|
||
The INSN, INSN_*_VALUE, and LENGTH arguments are passed to
|
||
cgen_lookup_insn unchanged.
|
||
INSN_INT_VALUE is used if CGEN_INT_INSN_P.
|
||
Otherwise INSN_BYTES_VALUE is used.
|
||
|
||
The result is the insn table entry or NULL if the instruction wasn't
|
||
recognized. */
|
||
|
||
const CGEN_INSN *
|
||
cgen_lookup_get_insn_operands (cd, insn, insn_int_value, insn_bytes_value,
|
||
length, indices, fields)
|
||
CGEN_CPU_DESC cd;
|
||
const CGEN_INSN *insn;
|
||
CGEN_INSN_INT insn_int_value;
|
||
/* ??? CGEN_INSN_BYTES would be a nice type name to use here. */
|
||
unsigned char *insn_bytes_value;
|
||
int length;
|
||
int *indices;
|
||
CGEN_FIELDS *fields;
|
||
{
|
||
/* Pass non-zero for ALIAS_P only if INSN != NULL.
|
||
If INSN == NULL, we want a real insn. */
|
||
insn = cgen_lookup_insn (cd, insn, insn_int_value, insn_bytes_value,
|
||
length, fields, insn != NULL);
|
||
if (! insn)
|
||
return NULL;
|
||
|
||
cgen_get_insn_operands (cd, insn, fields, indices);
|
||
return insn;
|
||
}
|
||
|
||
/* Allow signed overflow of instruction fields. */
|
||
void
|
||
cgen_set_signed_overflow_ok (cd)
|
||
CGEN_CPU_DESC cd;
|
||
{
|
||
cd->signed_overflow_ok_p = 1;
|
||
}
|
||
|
||
/* Generate an error message if a signed field in an instruction overflows. */
|
||
void
|
||
cgen_clear_signed_overflow_ok (cd)
|
||
CGEN_CPU_DESC cd;
|
||
{
|
||
cd->signed_overflow_ok_p = 0;
|
||
}
|
||
|
||
/* Will an error message be generated if a signed field in an instruction overflows ? */
|
||
unsigned int
|
||
cgen_signed_overflow_ok_p (cd)
|
||
CGEN_CPU_DESC cd;
|
||
{
|
||
return cd->signed_overflow_ok_p;
|
||
}
|