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34a79281e4
Remove regcache_raw_collect, update callers to use regcache::raw_collect. gdb/ChangeLog: * regcache.h (regcache_raw_collect): Remove, update callers to use regcache::raw_collect. * regcache.c (regcache_raw_collect): Remove.
478 lines
13 KiB
C
478 lines
13 KiB
C
/* Target-dependent code for GNU/Linux m32r.
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Copyright (C) 2004-2018 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "frame.h"
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#include "value.h"
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#include "regcache.h"
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#include "inferior.h"
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#include "osabi.h"
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#include "reggroups.h"
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#include "regset.h"
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#include "glibc-tdep.h"
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#include "solib-svr4.h"
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#include "symtab.h"
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#include "trad-frame.h"
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#include "frame-unwind.h"
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#include "m32r-tdep.h"
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#include "linux-tdep.h"
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/* Recognizing signal handler frames. */
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/* GNU/Linux has two flavors of signals. Normal signal handlers, and
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"realtime" (RT) signals. The RT signals can provide additional
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information to the signal handler if the SA_SIGINFO flag is set
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when establishing a signal handler using `sigaction'. It is not
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unlikely that future versions of GNU/Linux will support SA_SIGINFO
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for normal signals too. */
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/* When the m32r Linux kernel calls a signal handler and the
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SA_RESTORER flag isn't set, the return address points to a bit of
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code on the stack. This function returns whether the PC appears to
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be within this bit of code.
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The instruction sequence for normal signals is
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ldi r7, #__NR_sigreturn
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trap #2
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or 0x67 0x77 0x10 0xf2.
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Checking for the code sequence should be somewhat reliable, because
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the effect is to call the system call sigreturn. This is unlikely
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to occur anywhere other than in a signal trampoline.
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It kind of sucks that we have to read memory from the process in
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order to identify a signal trampoline, but there doesn't seem to be
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any other way. Therefore we only do the memory reads if no
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function name could be identified, which should be the case since
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the code is on the stack.
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Detection of signal trampolines for handlers that set the
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SA_RESTORER flag is in general not possible. Unfortunately this is
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what the GNU C Library has been doing for quite some time now.
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However, as of version 2.1.2, the GNU C Library uses signal
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trampolines (named __restore and __restore_rt) that are identical
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to the ones used by the kernel. Therefore, these trampolines are
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supported too. */
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static const gdb_byte linux_sigtramp_code[] = {
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0x67, 0x77, 0x10, 0xf2,
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};
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/* If PC is in a sigtramp routine, return the address of the start of
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the routine. Otherwise, return 0. */
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static CORE_ADDR
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m32r_linux_sigtramp_start (CORE_ADDR pc, struct frame_info *this_frame)
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{
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gdb_byte buf[4];
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/* We only recognize a signal trampoline if PC is at the start of
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one of the instructions. We optimize for finding the PC at the
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start of the instruction sequence, as will be the case when the
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trampoline is not the first frame on the stack. We assume that
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in the case where the PC is not at the start of the instruction
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sequence, there will be a few trailing readable bytes on the
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stack. */
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if (pc % 2 != 0)
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{
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if (!safe_frame_unwind_memory (this_frame, pc, buf, 2))
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return 0;
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if (memcmp (buf, linux_sigtramp_code, 2) == 0)
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pc -= 2;
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else
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return 0;
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}
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if (!safe_frame_unwind_memory (this_frame, pc, buf, 4))
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return 0;
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if (memcmp (buf, linux_sigtramp_code, 4) != 0)
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return 0;
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return pc;
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}
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/* This function does the same for RT signals. Here the instruction
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sequence is
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ldi r7, #__NR_rt_sigreturn
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trap #2
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or 0x97 0xf0 0x00 0xad 0x10 0xf2 0xf0 0x00.
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The effect is to call the system call rt_sigreturn. */
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static const gdb_byte linux_rt_sigtramp_code[] = {
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0x97, 0xf0, 0x00, 0xad, 0x10, 0xf2, 0xf0, 0x00,
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};
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/* If PC is in a RT sigtramp routine, return the address of the start
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of the routine. Otherwise, return 0. */
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static CORE_ADDR
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m32r_linux_rt_sigtramp_start (CORE_ADDR pc, struct frame_info *this_frame)
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{
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gdb_byte buf[4];
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/* We only recognize a signal trampoline if PC is at the start of
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one of the instructions. We optimize for finding the PC at the
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start of the instruction sequence, as will be the case when the
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trampoline is not the first frame on the stack. We assume that
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in the case where the PC is not at the start of the instruction
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sequence, there will be a few trailing readable bytes on the
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stack. */
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if (pc % 2 != 0)
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return 0;
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if (!safe_frame_unwind_memory (this_frame, pc, buf, 4))
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return 0;
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if (memcmp (buf, linux_rt_sigtramp_code, 4) == 0)
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{
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if (!safe_frame_unwind_memory (this_frame, pc + 4, buf, 4))
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return 0;
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if (memcmp (buf, linux_rt_sigtramp_code + 4, 4) == 0)
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return pc;
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}
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else if (memcmp (buf, linux_rt_sigtramp_code + 4, 4) == 0)
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{
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if (!safe_frame_unwind_memory (this_frame, pc - 4, buf, 4))
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return 0;
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if (memcmp (buf, linux_rt_sigtramp_code, 4) == 0)
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return pc - 4;
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}
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return 0;
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}
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static int
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m32r_linux_pc_in_sigtramp (CORE_ADDR pc, const char *name,
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struct frame_info *this_frame)
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{
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/* If we have NAME, we can optimize the search. The trampolines are
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named __restore and __restore_rt. However, they aren't dynamically
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exported from the shared C library, so the trampoline may appear to
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be part of the preceding function. This should always be sigaction,
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__sigaction, or __libc_sigaction (all aliases to the same function). */
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if (name == NULL || strstr (name, "sigaction") != NULL)
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return (m32r_linux_sigtramp_start (pc, this_frame) != 0
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|| m32r_linux_rt_sigtramp_start (pc, this_frame) != 0);
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return (strcmp ("__restore", name) == 0
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|| strcmp ("__restore_rt", name) == 0);
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}
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/* From <asm/sigcontext.h>. */
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static int m32r_linux_sc_reg_offset[] = {
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4 * 4, /* r0 */
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5 * 4, /* r1 */
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6 * 4, /* r2 */
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7 * 4, /* r3 */
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0 * 4, /* r4 */
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1 * 4, /* r5 */
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2 * 4, /* r6 */
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8 * 4, /* r7 */
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9 * 4, /* r8 */
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10 * 4, /* r9 */
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11 * 4, /* r10 */
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12 * 4, /* r11 */
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13 * 4, /* r12 */
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21 * 4, /* fp */
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22 * 4, /* lr */
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-1 * 4, /* sp */
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16 * 4, /* psw */
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-1 * 4, /* cbr */
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23 * 4, /* spi */
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20 * 4, /* spu */
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19 * 4, /* bpc */
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17 * 4, /* pc */
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15 * 4, /* accl */
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14 * 4 /* acch */
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};
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struct m32r_frame_cache
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{
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CORE_ADDR base, pc;
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struct trad_frame_saved_reg *saved_regs;
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};
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static struct m32r_frame_cache *
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m32r_linux_sigtramp_frame_cache (struct frame_info *this_frame,
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void **this_cache)
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{
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struct m32r_frame_cache *cache;
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CORE_ADDR sigcontext_addr, addr;
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int regnum;
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if ((*this_cache) != NULL)
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return (struct m32r_frame_cache *) (*this_cache);
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cache = FRAME_OBSTACK_ZALLOC (struct m32r_frame_cache);
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(*this_cache) = cache;
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cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
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cache->base = get_frame_register_unsigned (this_frame, M32R_SP_REGNUM);
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sigcontext_addr = cache->base + 4;
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cache->pc = get_frame_pc (this_frame);
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addr = m32r_linux_sigtramp_start (cache->pc, this_frame);
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if (addr == 0)
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{
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/* If this is a RT signal trampoline, adjust SIGCONTEXT_ADDR
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accordingly. */
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addr = m32r_linux_rt_sigtramp_start (cache->pc, this_frame);
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if (addr)
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sigcontext_addr += 128;
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else
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addr = get_frame_func (this_frame);
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}
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cache->pc = addr;
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cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
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for (regnum = 0; regnum < sizeof (m32r_linux_sc_reg_offset) / 4; regnum++)
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{
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if (m32r_linux_sc_reg_offset[regnum] >= 0)
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cache->saved_regs[regnum].addr =
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sigcontext_addr + m32r_linux_sc_reg_offset[regnum];
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}
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return cache;
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}
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static void
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m32r_linux_sigtramp_frame_this_id (struct frame_info *this_frame,
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void **this_cache,
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struct frame_id *this_id)
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{
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struct m32r_frame_cache *cache =
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m32r_linux_sigtramp_frame_cache (this_frame, this_cache);
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(*this_id) = frame_id_build (cache->base, cache->pc);
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}
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static struct value *
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m32r_linux_sigtramp_frame_prev_register (struct frame_info *this_frame,
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void **this_cache, int regnum)
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{
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struct m32r_frame_cache *cache =
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m32r_linux_sigtramp_frame_cache (this_frame, this_cache);
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return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum);
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}
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static int
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m32r_linux_sigtramp_frame_sniffer (const struct frame_unwind *self,
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struct frame_info *this_frame,
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void **this_cache)
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{
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CORE_ADDR pc = get_frame_pc (this_frame);
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const char *name;
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find_pc_partial_function (pc, &name, NULL, NULL);
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if (m32r_linux_pc_in_sigtramp (pc, name, this_frame))
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return 1;
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return 0;
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}
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static const struct frame_unwind m32r_linux_sigtramp_frame_unwind = {
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SIGTRAMP_FRAME,
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default_frame_unwind_stop_reason,
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m32r_linux_sigtramp_frame_this_id,
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m32r_linux_sigtramp_frame_prev_register,
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NULL,
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m32r_linux_sigtramp_frame_sniffer
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};
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/* Mapping between the registers in `struct pt_regs'
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format and GDB's register array layout. */
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static int m32r_pt_regs_offset[] = {
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4 * 4, /* r0 */
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4 * 5, /* r1 */
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4 * 6, /* r2 */
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4 * 7, /* r3 */
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4 * 0, /* r4 */
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4 * 1, /* r5 */
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4 * 2, /* r6 */
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4 * 8, /* r7 */
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4 * 9, /* r8 */
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4 * 10, /* r9 */
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4 * 11, /* r10 */
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4 * 12, /* r11 */
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4 * 13, /* r12 */
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4 * 24, /* fp */
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4 * 25, /* lr */
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4 * 23, /* sp */
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4 * 19, /* psw */
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4 * 19, /* cbr */
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4 * 26, /* spi */
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4 * 23, /* spu */
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4 * 22, /* bpc */
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4 * 20, /* pc */
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4 * 16, /* accl */
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4 * 15 /* acch */
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};
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#define PSW_OFFSET (4 * 19)
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#define BBPSW_OFFSET (4 * 21)
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#define SPU_OFFSET (4 * 23)
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#define SPI_OFFSET (4 * 26)
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#define M32R_LINUX_GREGS_SIZE (4 * 28)
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static void
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m32r_linux_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *gregs, size_t size)
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{
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const gdb_byte *regs = (const gdb_byte *) gregs;
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enum bfd_endian byte_order =
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gdbarch_byte_order (regcache->arch ());
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ULONGEST psw, bbpsw;
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gdb_byte buf[4];
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const gdb_byte *p;
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int i;
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psw = extract_unsigned_integer (regs + PSW_OFFSET, 4, byte_order);
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bbpsw = extract_unsigned_integer (regs + BBPSW_OFFSET, 4, byte_order);
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psw = ((0x00c1 & bbpsw) << 8) | ((0xc100 & psw) >> 8);
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for (i = 0; i < ARRAY_SIZE (m32r_pt_regs_offset); i++)
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{
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if (regnum != -1 && regnum != i)
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continue;
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switch (i)
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{
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case PSW_REGNUM:
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store_unsigned_integer (buf, 4, byte_order, psw);
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p = buf;
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break;
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case CBR_REGNUM:
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store_unsigned_integer (buf, 4, byte_order, psw & 1);
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p = buf;
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break;
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case M32R_SP_REGNUM:
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p = regs + ((psw & 0x80) ? SPU_OFFSET : SPI_OFFSET);
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break;
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default:
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p = regs + m32r_pt_regs_offset[i];
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}
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regcache->raw_supply (i, p);
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}
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}
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static void
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m32r_linux_collect_gregset (const struct regset *regset,
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const struct regcache *regcache,
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int regnum, void *gregs, size_t size)
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{
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gdb_byte *regs = (gdb_byte *) gregs;
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int i;
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enum bfd_endian byte_order =
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gdbarch_byte_order (regcache->arch ());
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ULONGEST psw;
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gdb_byte buf[4];
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regcache->raw_collect (PSW_REGNUM, buf);
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psw = extract_unsigned_integer (buf, 4, byte_order);
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for (i = 0; i < ARRAY_SIZE (m32r_pt_regs_offset); i++)
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{
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if (regnum != -1 && regnum != i)
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continue;
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switch (i)
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{
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case PSW_REGNUM:
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store_unsigned_integer (regs + PSW_OFFSET, 4, byte_order,
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(psw & 0xc1) << 8);
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store_unsigned_integer (regs + BBPSW_OFFSET, 4, byte_order,
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(psw >> 8) & 0xc1);
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break;
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case CBR_REGNUM:
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break;
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case M32R_SP_REGNUM:
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regcache->raw_collect
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(i, regs + ((psw & 0x80) ? SPU_OFFSET : SPI_OFFSET));
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break;
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default:
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regcache->raw_collect (i, regs + m32r_pt_regs_offset[i]);
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}
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}
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}
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static const struct regset m32r_linux_gregset = {
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NULL,
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m32r_linux_supply_gregset, m32r_linux_collect_gregset
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};
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static void
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m32r_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache)
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{
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cb (".reg", M32R_LINUX_GREGS_SIZE, &m32r_linux_gregset, NULL, cb_data);
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}
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static void
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m32r_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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linux_init_abi (info, gdbarch);
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/* Since EVB register is not available for native debug, we reduce
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the number of registers. */
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set_gdbarch_num_regs (gdbarch, M32R_NUM_REGS - 1);
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frame_unwind_append_unwinder (gdbarch, &m32r_linux_sigtramp_frame_unwind);
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/* GNU/Linux uses SVR4-style shared libraries. */
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set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, svr4_ilp32_fetch_link_map_offsets);
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/* Core file support. */
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set_gdbarch_iterate_over_regset_sections
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(gdbarch, m32r_linux_iterate_over_regset_sections);
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/* Enable TLS support. */
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set_gdbarch_fetch_tls_load_module_address (gdbarch,
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svr4_fetch_objfile_link_map);
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}
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void
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_initialize_m32r_linux_tdep (void)
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{
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gdbarch_register_osabi (bfd_arch_m32r, 0, GDB_OSABI_LINUX,
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m32r_linux_init_abi);
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}
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