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For GNU/Linux on x86-64, if the target is using the xsave format for passing the floating-point information from the inferior then there currently exists a bug relating to the x87 control registers, and the mxcsr register. The xsave format allows different floating-point features to be lazily enabled, a bit in the xsave format tells GDB which floating-point features have been enabled, and which have not. Currently in GDB, when reading the floating point state, we check the xsave bit flags, if the feature is enabled then we read the feature from the xsave buffer, and if the feature is not enabled, then we supply the default value from within GDB. Within GDB, when writing the floating point state, we first fetch the xsave state from the target and then, for any feature that is not yet enabled, we write the default values into the xsave buffer. Next we compare the regcache value with the value in the xsave buffer, and, if the value has changed we update the value in the xsave buffer, and mark the feature enabled in the xsave bit flags. The problem then, is that the x87 control registers were not following this pattern. We assumed that these registers were always written out by the kernel, and we always wrote them out to the xsave buffer (but didn't enabled the feature). The result of this is that if the kernel had not yet enabled the x87 feature then within GDB we would see random values for the x87 floating point control registers, and if the user tried to modify one of these register, that modification would be lost. Finally, the mxcsr register was also broken in the same way as the x87 control registers. The added complexity with this case is that the mxcsr register is part of both the avx and sse floating point feature set. When reading or writing this register we need to check that at least one of these features is enabled. This bug was present in native GDB, and within gdbserver. Both are fixed with this commit. gdb/ChangeLog: * common/x86-xstate.h (I387_FCTRL_INIT_VAL): New constant. (I387_MXCSR_INIT_VAL): New constant. * amd64-tdep.c (amd64_supply_xsave): Only read state from xsave buffer if it was supplied by the inferior. * i387-tdep.c (i387_supply_fsave): Use I387_MXCSR_INIT_VAL. (i387_xsave_get_clear_bv): New function. (i387_supply_xsave): Only read x87 control registers from the xsave buffer if the feature is enabled, and the state will have been written, otherwise, provide a suitable default. (i387_collect_xsave): Pre-clear all registers in xsave buffer, including x87 control registers. Update control registers if they have changed from the default value, and mark features as enabled as required. * i387-tdep.h (i387_xsave_get_clear_bv): Declare. gdb/gdbserver/ChangeLog: * i387-fp.c (i387_cache_to_xsave): Only write x87 control registers to the cache if their values have changed. (i387_xsave_to_cache): Provide default values for x87 control registers when these features are available, but disabled. * regcache.c (supply_register_by_name_zeroed): New function. * regcache.h (supply_register_by_name_zeroed): Declare new function. gdb/testsuite/ChangeLog: * gdb.arch/amd64-init-x87-values.S: New file. * gdb.arch/amd64-init-x87-values.exp: New file.
89 lines
3.3 KiB
C
89 lines
3.3 KiB
C
/* Common code for x86 XSAVE extended state.
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Copyright (C) 2010-2018 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef X86_XSTATE_H
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#define X86_XSTATE_H 1
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/* The extended state feature bits. */
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#define X86_XSTATE_X87 (1ULL << 0)
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#define X86_XSTATE_SSE (1ULL << 1)
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#define X86_XSTATE_AVX (1ULL << 2)
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#define X86_XSTATE_BNDREGS (1ULL << 3)
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#define X86_XSTATE_BNDCFG (1ULL << 4)
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#define X86_XSTATE_MPX (X86_XSTATE_BNDREGS | X86_XSTATE_BNDCFG)
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/* AVX 512 adds three feature bits. All three must be enabled. */
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#define X86_XSTATE_K (1ULL << 5)
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#define X86_XSTATE_ZMM_H (1ULL << 6)
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#define X86_XSTATE_ZMM (1ULL << 7)
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#define X86_XSTATE_AVX512 (X86_XSTATE_K | X86_XSTATE_ZMM_H \
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| X86_XSTATE_ZMM)
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#define X86_XSTATE_PKRU (1ULL << 9)
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/* Supported mask and size of the extended state. */
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#define X86_XSTATE_X87_MASK X86_XSTATE_X87
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#define X86_XSTATE_SSE_MASK (X86_XSTATE_X87 | X86_XSTATE_SSE)
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#define X86_XSTATE_AVX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_AVX)
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#define X86_XSTATE_MPX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_MPX)
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#define X86_XSTATE_AVX_MPX_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_MPX)
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#define X86_XSTATE_AVX_AVX512_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_AVX512)
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#define X86_XSTATE_AVX_MPX_AVX512_PKU_MASK (X86_XSTATE_AVX_MPX_MASK\
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| X86_XSTATE_AVX512 | X86_XSTATE_PKRU)
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#define X86_XSTATE_ALL_MASK (X86_XSTATE_AVX_MPX_AVX512_PKU_MASK)
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#define X86_XSTATE_SSE_SIZE 576
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#define X86_XSTATE_AVX_SIZE 832
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#define X86_XSTATE_BNDREGS_SIZE 1024
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#define X86_XSTATE_BNDCFG_SIZE 1088
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#define X86_XSTATE_AVX512_SIZE 2688
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#define X86_XSTATE_PKRU_SIZE 2696
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#define X86_XSTATE_MAX_SIZE 2696
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/* In case one of the MPX XCR0 bits is set we consider we have MPX. */
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#define HAS_MPX(XCR0) (((XCR0) & X86_XSTATE_MPX) != 0)
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#define HAS_AVX(XCR0) (((XCR0) & X86_XSTATE_AVX) != 0)
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#define HAS_AVX512(XCR0) (((XCR0) & X86_XSTATE_AVX512) != 0)
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#define HAS_PKRU(XCR0) (((XCR0) & X86_XSTATE_PKRU) != 0)
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/* Get I386 XSAVE extended state size. */
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#define X86_XSTATE_SIZE(XCR0) \
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(HAS_PKRU (XCR0) ? X86_XSTATE_PKRU_SIZE : \
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(HAS_AVX512 (XCR0) ? X86_XSTATE_AVX512_SIZE : \
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(HAS_MPX (XCR0) ? X86_XSTATE_BNDCFG_SIZE : \
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(HAS_AVX (XCR0) ? X86_XSTATE_AVX_SIZE : X86_XSTATE_SSE_SIZE))))
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/* Initial value for fctrl register, as defined in the X86 manual, and
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confirmed in the (Linux) kernel source. When the x87 floating point
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feature is not enabled in an inferior we use this as the value of the
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fcrtl register. */
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#define I387_FCTRL_INIT_VAL 0x037f
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/* Initial value for mxcsr register. When the avx and sse floating point
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features are not enabled in an inferior we use this as the value of the
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mxcsr register. */
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#define I387_MXCSR_INIT_VAL 0x1f80
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#endif /* X86_XSTATE_H */
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