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...not Vector Gradient. See: DWARF for the ARM® 64-bit Architecture (AArch64) with SVE support gdb/ * arch/aarch64.h (aarch64_regnum): Update comment.
93 lines
3.5 KiB
C
93 lines
3.5 KiB
C
/* Common target-dependent functionality for AArch64.
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Copyright (C) 2017-2018 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef ARCH_AARCH64_H
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#define ARCH_AARCH64_H
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#include "common/tdesc.h"
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/* Create the aarch64 target description. A non zero VQ value indicates both
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the presence of SVE and the Vector Quotient - the number of 128bit chunks in
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an SVE Z register. */
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target_desc *aarch64_create_target_description (uint64_t vq);
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/* Register numbers of various important registers.
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Note that on SVE, the Z registers reuse the V register numbers and the V
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registers become pseudo registers. */
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enum aarch64_regnum
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{
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AARCH64_X0_REGNUM, /* First integer register. */
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AARCH64_FP_REGNUM = AARCH64_X0_REGNUM + 29, /* Frame register, if used. */
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AARCH64_LR_REGNUM = AARCH64_X0_REGNUM + 30, /* Return address. */
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AARCH64_SP_REGNUM, /* Stack pointer. */
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AARCH64_PC_REGNUM, /* Program counter. */
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AARCH64_CPSR_REGNUM, /* Current Program Status Register. */
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AARCH64_V0_REGNUM, /* First fp/vec register. */
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AARCH64_V31_REGNUM = AARCH64_V0_REGNUM + 31, /* Last fp/vec register. */
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AARCH64_SVE_Z0_REGNUM = AARCH64_V0_REGNUM, /* First SVE Z register. */
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AARCH64_SVE_Z31_REGNUM = AARCH64_V31_REGNUM, /* Last SVE Z register. */
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AARCH64_FPSR_REGNUM, /* Floating Point Status Register. */
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AARCH64_FPCR_REGNUM, /* Floating Point Control Register. */
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AARCH64_SVE_P0_REGNUM, /* First SVE predicate register. */
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AARCH64_SVE_P15_REGNUM = AARCH64_SVE_P0_REGNUM + 15, /* Last SVE predicate
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register. */
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AARCH64_SVE_FFR_REGNUM, /* SVE First Fault Register. */
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AARCH64_SVE_VG_REGNUM, /* SVE Vector Granule. */
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/* Other useful registers. */
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AARCH64_LAST_X_ARG_REGNUM = AARCH64_X0_REGNUM + 7,
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AARCH64_STRUCT_RETURN_REGNUM = AARCH64_X0_REGNUM + 8,
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AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
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};
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#define AARCH64_X_REGS_NUM 31
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#define AARCH64_V_REGS_NUM 32
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#define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM
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#define AARCH64_SVE_P_REGS_NUM 16
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#define AARCH64_NUM_REGS AARCH64_FPCR_REGNUM + 1
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#define AARCH64_SVE_NUM_REGS AARCH64_SVE_VG_REGNUM + 1
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/* There are a number of ways of expressing the current SVE vector size:
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VL : Vector Length.
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The number of bytes in an SVE Z register.
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VQ : Vector Quotient.
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The number of 128bit chunks in an SVE Z register.
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VG : Vector Granule.
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The number of 64bit chunks in an SVE Z register. */
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#define sve_vg_from_vl(vl) ((vl) / 8)
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#define sve_vl_from_vg(vg) ((vg) * 8)
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#ifndef sve_vq_from_vl
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#define sve_vq_from_vl(vl) ((vl) / 0x10)
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#endif
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#ifndef sve_vl_from_vq
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#define sve_vl_from_vq(vq) ((vq) * 0x10)
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#endif
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#define sve_vq_from_vg(vg) (sve_vq_from_vl (sve_vl_from_vg (vg)))
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#define sve_vg_from_vq(vq) (sve_vg_from_vl (sve_vl_from_vq (vq)))
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/* Maximum supported VQ value. Increase if required. */
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#define AARCH64_MAX_SVE_VQ 16
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#endif /* ARCH_AARCH64_H */
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