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785 lines
25 KiB
C
785 lines
25 KiB
C
/* Target-dependent code for Xilinx MicroBlaze.
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Copyright (C) 2009-2017 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "arch-utils.h"
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#include "dis-asm.h"
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#include "frame.h"
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#include "trad-frame.h"
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#include "symtab.h"
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#include "value.h"
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#include "gdbcmd.h"
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#include "breakpoint.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include "frame-base.h"
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#include "frame-unwind.h"
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#include "dwarf2-frame.h"
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#include "osabi.h"
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#include "target-descriptions.h"
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#include "opcodes/microblaze-opcm.h"
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#include "opcodes/microblaze-dis.h"
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#include "microblaze-tdep.h"
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#include "remote.h"
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#include "features/microblaze-with-stack-protect.c"
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#include "features/microblaze.c"
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/* Instruction macros used for analyzing the prologue. */
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/* This set of instruction macros need to be changed whenever the
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prologue generated by the compiler could have more instructions or
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different type of instructions.
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This set also needs to be verified if it is complete. */
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#define IS_RETURN(op) (op == rtsd || op == rtid)
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#define IS_UPDATE_SP(op, rd, ra) \
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((op == addik || op == addi) && rd == REG_SP && ra == REG_SP)
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#define IS_SPILL_SP(op, rd, ra) \
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((op == swi || op == sw) && rd == REG_SP && ra == REG_SP)
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#define IS_SPILL_REG(op, rd, ra) \
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((op == swi || op == sw) && rd != REG_SP && ra == REG_SP)
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#define IS_ALSO_SPILL_REG(op, rd, ra, rb) \
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((op == swi || op == sw) && rd != REG_SP && ra == 0 && rb == REG_SP)
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#define IS_SETUP_FP(op, ra, rb) \
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((op == add || op == addik || op == addk) && ra == REG_SP && rb == 0)
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#define IS_SPILL_REG_FP(op, rd, ra, fpregnum) \
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((op == swi || op == sw) && rd != REG_SP && ra == fpregnum && ra != 0)
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#define IS_SAVE_HIDDEN_PTR(op, rd, ra, rb) \
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((op == add || op == addik) && ra == MICROBLAZE_FIRST_ARGREG && rb == 0)
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/* The registers of the Xilinx microblaze processor. */
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static const char *microblaze_register_names[] =
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{
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
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"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
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"rpc", "rmsr", "rear", "resr", "rfsr", "rbtr",
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"rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
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"rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
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"redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
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"rslr", "rshr"
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};
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#define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
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static unsigned int microblaze_debug_flag = 0;
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static void
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microblaze_debug (const char *fmt, ...)
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{
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if (microblaze_debug_flag)
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{
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va_list args;
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va_start (args, fmt);
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printf_unfiltered ("MICROBLAZE: ");
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vprintf_unfiltered (fmt, args);
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va_end (args);
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}
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}
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/* Return the name of register REGNUM. */
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static const char *
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microblaze_register_name (struct gdbarch *gdbarch, int regnum)
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{
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if (regnum >= 0 && regnum < MICROBLAZE_NUM_REGS)
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return microblaze_register_names[regnum];
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return NULL;
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}
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static struct type *
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microblaze_register_type (struct gdbarch *gdbarch, int regnum)
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{
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if (regnum == MICROBLAZE_SP_REGNUM)
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return builtin_type (gdbarch)->builtin_data_ptr;
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if (regnum == MICROBLAZE_PC_REGNUM)
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return builtin_type (gdbarch)->builtin_func_ptr;
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return builtin_type (gdbarch)->builtin_int;
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}
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/* Fetch the instruction at PC. */
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static unsigned long
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microblaze_fetch_instruction (CORE_ADDR pc)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch ());
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gdb_byte buf[4];
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/* If we can't read the instruction at PC, return zero. */
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if (target_read_code (pc, buf, sizeof (buf)))
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return 0;
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return extract_unsigned_integer (buf, 4, byte_order);
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}
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constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
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typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
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/* Allocate and initialize a frame cache. */
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static struct microblaze_frame_cache *
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microblaze_alloc_frame_cache (void)
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{
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struct microblaze_frame_cache *cache;
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cache = FRAME_OBSTACK_ZALLOC (struct microblaze_frame_cache);
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/* Base address. */
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cache->base = 0;
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cache->pc = 0;
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/* Frameless until proven otherwise. */
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cache->frameless_p = 1;
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return cache;
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}
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/* The base of the current frame is actually in the stack pointer.
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This happens when there is no frame pointer (microblaze ABI does not
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require a frame pointer) or when we're stopped in the prologue or
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epilogue itself. In these cases, microblaze_analyze_prologue will need
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to update fi->frame before returning or analyzing the register
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save instructions. */
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#define MICROBLAZE_MY_FRAME_IN_SP 0x1
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/* The base of the current frame is in a frame pointer register.
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This register is noted in frame_extra_info->fp_regnum.
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Note that the existance of an FP might also indicate that the
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function has called alloca. */
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#define MICROBLAZE_MY_FRAME_IN_FP 0x2
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/* Function prologues on the Xilinx microblaze processors consist of:
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- adjustments to the stack pointer (r1) (addi r1, r1, imm)
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- making a copy of r1 into another register (a "frame" pointer)
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(add r?, r1, r0)
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- store word/multiples that use r1 or the frame pointer as the
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base address (swi r?, r1, imm OR swi r?, fp, imm)
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Note that microblaze really doesn't have a real frame pointer.
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Instead, the compiler may copy the SP into a register (usually
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r19) to act as an arg pointer. For our target-dependent purposes,
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the frame info's "frame" member will be the beginning of the
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frame. The SP could, in fact, point below this.
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The prologue ends when an instruction fails to meet either of
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these criteria. */
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/* Analyze the prologue to determine where registers are saved,
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the end of the prologue, etc. Return the address of the first line
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of "real" code (i.e., the end of the prologue). */
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static CORE_ADDR
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microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
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CORE_ADDR current_pc,
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struct microblaze_frame_cache *cache)
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{
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const char *name;
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CORE_ADDR func_addr, func_end, addr, stop, prologue_end_addr = 0;
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unsigned long insn;
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int rd, ra, rb, imm;
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enum microblaze_instr op;
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int flags = 0;
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int save_hidden_pointer_found = 0;
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int non_stack_instruction_found = 0;
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/* Find the start of this function. */
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find_pc_partial_function (pc, &name, &func_addr, &func_end);
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if (func_addr < pc)
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pc = func_addr;
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if (current_pc < pc)
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return current_pc;
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/* Initialize info about frame. */
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cache->framesize = 0;
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cache->fp_regnum = MICROBLAZE_SP_REGNUM;
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cache->frameless_p = 1;
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/* Start decoding the prologue. We start by checking two special cases:
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1. We're about to return
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2. We're at the first insn of the prologue.
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If we're about to return, our frame has already been deallocated.
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If we are stopped at the first instruction of a prologue,
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then our frame has not yet been set up. */
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/* Get the first insn from memory. */
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insn = microblaze_fetch_instruction (pc);
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op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm);
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if (IS_RETURN(op))
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return pc;
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/* Start at beginning of function and analyze until we get to the
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current pc, or the end of the function, whichever is first. */
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stop = (current_pc < func_end ? current_pc : func_end);
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microblaze_debug ("Scanning prologue: name=%s, func_addr=%s, stop=%s\n",
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name, paddress (gdbarch, func_addr),
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paddress (gdbarch, stop));
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for (addr = func_addr; addr < stop; addr += INST_WORD_SIZE)
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{
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insn = microblaze_fetch_instruction (addr);
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op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm);
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microblaze_debug ("%s %08lx\n", paddress (gdbarch, pc), insn);
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/* This code is very sensitive to what functions are present in the
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prologue. It assumes that the (addi, addik, swi, sw) can be the
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only instructions in the prologue. */
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if (IS_UPDATE_SP(op, rd, ra))
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{
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microblaze_debug ("got addi r1,r1,%d; contnuing\n", imm);
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if (cache->framesize)
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break; /* break if framesize already computed. */
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cache->framesize = -imm; /* stack grows towards low memory. */
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cache->frameless_p = 0; /* Frame found. */
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save_hidden_pointer_found = 0;
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non_stack_instruction_found = 0;
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continue;
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}
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else if (IS_SPILL_SP(op, rd, ra))
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{
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/* Spill stack pointer. */
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cache->register_offsets[rd] = imm; /* SP spilled before updating. */
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microblaze_debug ("swi r1 r1 %d, continuing\n", imm);
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save_hidden_pointer_found = 0;
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if (!cache->framesize)
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non_stack_instruction_found = 0;
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continue;
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}
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else if (IS_SPILL_REG(op, rd, ra))
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{
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/* Spill register. */
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cache->register_offsets[rd] = imm - cache->framesize;
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microblaze_debug ("swi %d r1 %d, continuing\n", rd, imm);
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save_hidden_pointer_found = 0;
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if (!cache->framesize)
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non_stack_instruction_found = 0;
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continue;
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}
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else if (IS_ALSO_SPILL_REG(op, rd, ra, rb))
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{
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/* Spill register. */
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cache->register_offsets[rd] = 0 - cache->framesize;
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microblaze_debug ("sw %d r0 r1, continuing\n", rd);
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save_hidden_pointer_found = 0;
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if (!cache->framesize)
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non_stack_instruction_found = 0;
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continue;
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}
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else if (IS_SETUP_FP(op, ra, rb))
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{
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/* We have a frame pointer. Note the register which is
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acting as the frame pointer. */
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flags |= MICROBLAZE_MY_FRAME_IN_FP;
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flags &= ~MICROBLAZE_MY_FRAME_IN_SP;
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cache->fp_regnum = rd;
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microblaze_debug ("Found a frame pointer: r%d\n", cache->fp_regnum);
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save_hidden_pointer_found = 0;
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if (!cache->framesize)
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non_stack_instruction_found = 0;
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continue;
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}
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else if (IS_SPILL_REG_FP(op, rd, ra, cache->fp_regnum))
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{
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/* reg spilled after updating. */
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cache->register_offsets[rd] = imm - cache->framesize;
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microblaze_debug ("swi %d %d %d, continuing\n", rd, ra, imm);
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save_hidden_pointer_found = 0;
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if (!cache->framesize)
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non_stack_instruction_found = 0;
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continue;
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}
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else if (IS_SAVE_HIDDEN_PTR(op, rd, ra, rb))
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{
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/* If the first argument is a hidden pointer to the area where the
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return structure is to be saved, then it is saved as part of the
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prologue. */
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microblaze_debug ("add %d %d %d, continuing\n", rd, ra, rb);
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save_hidden_pointer_found = 1;
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if (!cache->framesize)
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non_stack_instruction_found = 0;
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continue;
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}
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/* As a result of the modification in the next step where we continue
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to analyze the prologue till we reach a control flow instruction,
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we need another variable to store when exactly a non-stack
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instruction was encountered, which is the current definition
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of a prologue. */
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if (!non_stack_instruction_found)
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prologue_end_addr = addr;
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non_stack_instruction_found = 1;
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/* When optimizations are enabled, it is not guaranteed that prologue
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instructions are not mixed in with other instructions from the
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program. Some programs show this behavior at -O2. This can be
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avoided by adding -fno-schedule-insns2 switch as of now (edk 8.1)
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In such cases, we scan the function until we see the first control
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instruction. */
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{
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unsigned op = (unsigned)insn >> 26;
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/* continue if not control flow (branch, return). */
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if (op != 0x26 && op != 0x27 && op != 0x2d && op != 0x2e && op != 0x2f)
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continue;
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else if (op == 0x2c)
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continue; /* continue if imm. */
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}
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/* This is not a prologue insn, so stop here. */
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microblaze_debug ("insn is not a prologue insn -- ending scan\n");
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break;
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}
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microblaze_debug ("done analyzing prologue\n");
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microblaze_debug ("prologue end = 0x%x\n", (int) addr);
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/* If the last instruction was an add rd, r5, r0 then don't count it as
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part of the prologue. */
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if (save_hidden_pointer_found)
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prologue_end_addr -= INST_WORD_SIZE;
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return prologue_end_addr;
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}
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static CORE_ADDR
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microblaze_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
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{
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gdb_byte buf[4];
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CORE_ADDR pc;
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frame_unwind_register (next_frame, MICROBLAZE_PC_REGNUM, buf);
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pc = extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
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/* For sentinel frame, return address is actual PC. For other frames,
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return address is pc+8. This is a workaround because gcc does not
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generate correct return address in CIE. */
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if (frame_relative_level (next_frame) >= 0)
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pc += 8;
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return pc;
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}
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/* Return PC of first real instruction of the function starting at
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START_PC. */
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static CORE_ADDR
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microblaze_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
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{
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struct symtab_and_line sal;
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CORE_ADDR func_start, func_end, ostart_pc;
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struct microblaze_frame_cache cache;
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/* This is the preferred method, find the end of the prologue by
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using the debugging information. Debugging info does not always
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give the right answer since parameters are stored on stack after this.
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Always analyze the prologue. */
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if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
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{
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sal = find_pc_line (func_start, 0);
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if (sal.end < func_end
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&& start_pc <= sal.end)
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start_pc = sal.end;
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}
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ostart_pc = microblaze_analyze_prologue (gdbarch, func_start, 0xffffffffUL,
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&cache);
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if (ostart_pc > start_pc)
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return ostart_pc;
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return start_pc;
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}
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/* Normal frames. */
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static struct microblaze_frame_cache *
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microblaze_frame_cache (struct frame_info *next_frame, void **this_cache)
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{
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struct microblaze_frame_cache *cache;
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struct gdbarch *gdbarch = get_frame_arch (next_frame);
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int rn;
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if (*this_cache)
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return (struct microblaze_frame_cache *) *this_cache;
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cache = microblaze_alloc_frame_cache ();
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*this_cache = cache;
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cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
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/* Clear offsets to saved regs in frame. */
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for (rn = 0; rn < gdbarch_num_regs (gdbarch); rn++)
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cache->register_offsets[rn] = -1;
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/* Call for side effects. */
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get_frame_func (next_frame);
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cache->pc = get_frame_address_in_block (next_frame);
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return cache;
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}
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static void
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microblaze_frame_this_id (struct frame_info *next_frame, void **this_cache,
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struct frame_id *this_id)
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{
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struct microblaze_frame_cache *cache =
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microblaze_frame_cache (next_frame, this_cache);
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/* This marks the outermost frame. */
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if (cache->base == 0)
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return;
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(*this_id) = frame_id_build (cache->base, cache->pc);
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}
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static struct value *
|
||
microblaze_frame_prev_register (struct frame_info *this_frame,
|
||
void **this_cache, int regnum)
|
||
{
|
||
struct microblaze_frame_cache *cache =
|
||
microblaze_frame_cache (this_frame, this_cache);
|
||
|
||
if (cache->frameless_p)
|
||
{
|
||
if (regnum == MICROBLAZE_PC_REGNUM)
|
||
regnum = 15;
|
||
if (regnum == MICROBLAZE_SP_REGNUM)
|
||
regnum = 1;
|
||
return trad_frame_get_prev_register (this_frame,
|
||
cache->saved_regs, regnum);
|
||
}
|
||
else
|
||
return trad_frame_get_prev_register (this_frame, cache->saved_regs,
|
||
regnum);
|
||
|
||
}
|
||
|
||
static const struct frame_unwind microblaze_frame_unwind =
|
||
{
|
||
NORMAL_FRAME,
|
||
default_frame_unwind_stop_reason,
|
||
microblaze_frame_this_id,
|
||
microblaze_frame_prev_register,
|
||
NULL,
|
||
default_frame_sniffer
|
||
};
|
||
|
||
static CORE_ADDR
|
||
microblaze_frame_base_address (struct frame_info *next_frame,
|
||
void **this_cache)
|
||
{
|
||
struct microblaze_frame_cache *cache =
|
||
microblaze_frame_cache (next_frame, this_cache);
|
||
|
||
return cache->base;
|
||
}
|
||
|
||
static const struct frame_base microblaze_frame_base =
|
||
{
|
||
µblaze_frame_unwind,
|
||
microblaze_frame_base_address,
|
||
microblaze_frame_base_address,
|
||
microblaze_frame_base_address
|
||
};
|
||
|
||
/* Extract from an array REGBUF containing the (raw) register state, a
|
||
function return value of TYPE, and copy that into VALBUF. */
|
||
static void
|
||
microblaze_extract_return_value (struct type *type, struct regcache *regcache,
|
||
gdb_byte *valbuf)
|
||
{
|
||
gdb_byte buf[8];
|
||
|
||
/* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
|
||
switch (TYPE_LENGTH (type))
|
||
{
|
||
case 1: /* return last byte in the register. */
|
||
regcache_cooked_read (regcache, MICROBLAZE_RETVAL_REGNUM, buf);
|
||
memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
|
||
return;
|
||
case 2: /* return last 2 bytes in register. */
|
||
regcache_cooked_read (regcache, MICROBLAZE_RETVAL_REGNUM, buf);
|
||
memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
|
||
return;
|
||
case 4: /* for sizes 4 or 8, copy the required length. */
|
||
case 8:
|
||
regcache_cooked_read (regcache, MICROBLAZE_RETVAL_REGNUM, buf);
|
||
regcache_cooked_read (regcache, MICROBLAZE_RETVAL_REGNUM+1, buf+4);
|
||
memcpy (valbuf, buf, TYPE_LENGTH (type));
|
||
return;
|
||
default:
|
||
internal_error (__FILE__, __LINE__,
|
||
_("Unsupported return value size requested"));
|
||
}
|
||
}
|
||
|
||
/* Store the return value in VALBUF (of type TYPE) where the caller
|
||
expects to see it.
|
||
|
||
Integers up to four bytes are stored in r3.
|
||
|
||
Longs are stored in r3 (most significant word) and r4 (least
|
||
significant word).
|
||
|
||
Small structures are always returned on stack. */
|
||
|
||
static void
|
||
microblaze_store_return_value (struct type *type, struct regcache *regcache,
|
||
const gdb_byte *valbuf)
|
||
{
|
||
int len = TYPE_LENGTH (type);
|
||
gdb_byte buf[8];
|
||
|
||
memset (buf, 0, sizeof(buf));
|
||
|
||
/* Integral and pointer return values. */
|
||
|
||
if (len > 4)
|
||
{
|
||
gdb_assert (len == 8);
|
||
memcpy (buf, valbuf, 8);
|
||
regcache_cooked_write (regcache, MICROBLAZE_RETVAL_REGNUM+1, buf + 4);
|
||
}
|
||
else
|
||
/* ??? Do we need to do any sign-extension here? */
|
||
memcpy (buf + 4 - len, valbuf, len);
|
||
|
||
regcache_cooked_write (regcache, MICROBLAZE_RETVAL_REGNUM, buf);
|
||
}
|
||
|
||
static enum return_value_convention
|
||
microblaze_return_value (struct gdbarch *gdbarch, struct value *function,
|
||
struct type *type, struct regcache *regcache,
|
||
gdb_byte *readbuf, const gdb_byte *writebuf)
|
||
{
|
||
if (readbuf)
|
||
microblaze_extract_return_value (type, regcache, readbuf);
|
||
if (writebuf)
|
||
microblaze_store_return_value (type, regcache, writebuf);
|
||
|
||
return RETURN_VALUE_REGISTER_CONVENTION;
|
||
}
|
||
|
||
static int
|
||
microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
|
||
{
|
||
return (TYPE_LENGTH (type) == 16);
|
||
}
|
||
|
||
static void
|
||
microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc)
|
||
{
|
||
regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc);
|
||
}
|
||
|
||
static int dwarf2_to_reg_map[78] =
|
||
{ 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */
|
||
4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */
|
||
8 /* r8 */, 9 /* r9 */, 10 /* r10 */, 11 /* r11 */, /* 8-11 */
|
||
12 /* r12 */, 13 /* r13 */, 14 /* r14 */, 15 /* r15 */, /* 12-15 */
|
||
16 /* r16 */, 17 /* r17 */, 18 /* r18 */, 19 /* r19 */, /* 16-19 */
|
||
20 /* r20 */, 21 /* r21 */, 22 /* r22 */, 23 /* r23 */, /* 20-23 */
|
||
24 /* r24 */, 25 /* r25 */, 26 /* r26 */, 27 /* r27 */, /* 24-25 */
|
||
28 /* r28 */, 29 /* r29 */, 30 /* r30 */, 31 /* r31 */, /* 28-31 */
|
||
-1 /* $f0 */, -1 /* $f1 */, -1 /* $f2 */, -1 /* $f3 */, /* 32-35 */
|
||
-1 /* $f4 */, -1 /* $f5 */, -1 /* $f6 */, -1 /* $f7 */, /* 36-39 */
|
||
-1 /* $f8 */, -1 /* $f9 */, -1 /* $f10 */, -1 /* $f11 */, /* 40-43 */
|
||
-1 /* $f12 */, -1 /* $f13 */, -1 /* $f14 */, -1 /* $f15 */, /* 44-47 */
|
||
-1 /* $f16 */, -1 /* $f17 */, -1 /* $f18 */, -1 /* $f19 */, /* 48-51 */
|
||
-1 /* $f20 */, -1 /* $f21 */, -1 /* $f22 */, -1 /* $f23 */, /* 52-55 */
|
||
-1 /* $f24 */, -1 /* $f25 */, -1 /* $f26 */, -1 /* $f27 */, /* 56-59 */
|
||
-1 /* $f28 */, -1 /* $f29 */, -1 /* $f30 */, -1 /* $f31 */, /* 60-63 */
|
||
-1 /* hi */, -1 /* lo */, -1 /* accum*/, 33 /* rmsr */, /* 64-67 */
|
||
-1 /* $fcc1*/, -1 /* $fcc2*/, -1 /* $fcc3*/, -1 /* $fcc4*/, /* 68-71 */
|
||
-1 /* $fcc5*/, -1 /* $fcc6*/, -1 /* $fcc7*/, -1 /* $ap */, /* 72-75 */
|
||
-1 /* $rap */, -1 /* $frp */ /* 76-77 */
|
||
};
|
||
|
||
static int
|
||
microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
|
||
{
|
||
if (reg >= 0 && reg < sizeof (dwarf2_to_reg_map))
|
||
return dwarf2_to_reg_map[reg];
|
||
return -1;
|
||
}
|
||
|
||
static void
|
||
microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
|
||
{
|
||
register_remote_g_packet_guess (gdbarch,
|
||
4 * MICROBLAZE_NUM_CORE_REGS,
|
||
tdesc_microblaze);
|
||
|
||
register_remote_g_packet_guess (gdbarch,
|
||
4 * MICROBLAZE_NUM_REGS,
|
||
tdesc_microblaze_with_stack_protect);
|
||
}
|
||
|
||
static struct gdbarch *
|
||
microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||
{
|
||
struct gdbarch_tdep *tdep;
|
||
struct gdbarch *gdbarch;
|
||
struct tdesc_arch_data *tdesc_data = NULL;
|
||
const struct target_desc *tdesc = info.target_desc;
|
||
|
||
/* If there is already a candidate, use it. */
|
||
arches = gdbarch_list_lookup_by_info (arches, &info);
|
||
if (arches != NULL)
|
||
return arches->gdbarch;
|
||
if (tdesc == NULL)
|
||
tdesc = tdesc_microblaze;
|
||
|
||
/* Check any target description for validity. */
|
||
if (tdesc_has_registers (tdesc))
|
||
{
|
||
const struct tdesc_feature *feature;
|
||
int valid_p;
|
||
int i;
|
||
|
||
feature = tdesc_find_feature (tdesc,
|
||
"org.gnu.gdb.microblaze.core");
|
||
if (feature == NULL)
|
||
return NULL;
|
||
tdesc_data = tdesc_data_alloc ();
|
||
|
||
valid_p = 1;
|
||
for (i = 0; i < MICROBLAZE_NUM_CORE_REGS; i++)
|
||
valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
|
||
microblaze_register_names[i]);
|
||
feature = tdesc_find_feature (tdesc,
|
||
"org.gnu.gdb.microblaze.stack-protect");
|
||
if (feature != NULL)
|
||
{
|
||
valid_p = 1;
|
||
valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
||
MICROBLAZE_SLR_REGNUM,
|
||
"rslr");
|
||
valid_p &= tdesc_numbered_register (feature, tdesc_data,
|
||
MICROBLAZE_SHR_REGNUM,
|
||
"rshr");
|
||
}
|
||
|
||
if (!valid_p)
|
||
{
|
||
tdesc_data_cleanup (tdesc_data);
|
||
return NULL;
|
||
}
|
||
}
|
||
|
||
/* Allocate space for the new architecture. */
|
||
tdep = XNEW (struct gdbarch_tdep);
|
||
gdbarch = gdbarch_alloc (&info, tdep);
|
||
|
||
set_gdbarch_long_double_bit (gdbarch, 128);
|
||
|
||
set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
|
||
set_gdbarch_register_name (gdbarch, microblaze_register_name);
|
||
set_gdbarch_register_type (gdbarch, microblaze_register_type);
|
||
|
||
/* Register numbers of various important registers. */
|
||
set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM);
|
||
set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM);
|
||
|
||
/* Map Dwarf2 registers to GDB registers. */
|
||
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
|
||
|
||
/* Call dummy code. */
|
||
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
|
||
|
||
set_gdbarch_return_value (gdbarch, microblaze_return_value);
|
||
set_gdbarch_stabs_argument_has_addr
|
||
(gdbarch, microblaze_stabs_argument_has_addr);
|
||
|
||
set_gdbarch_skip_prologue (gdbarch, microblaze_skip_prologue);
|
||
|
||
/* Stack grows downward. */
|
||
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
||
|
||
set_gdbarch_breakpoint_kind_from_pc (gdbarch,
|
||
microblaze_breakpoint::kind_from_pc);
|
||
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
|
||
microblaze_breakpoint::bp_from_kind);
|
||
|
||
set_gdbarch_frame_args_skip (gdbarch, 8);
|
||
|
||
set_gdbarch_print_insn (gdbarch, print_insn_microblaze);
|
||
|
||
set_gdbarch_write_pc (gdbarch, microblaze_write_pc);
|
||
|
||
set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc);
|
||
|
||
microblaze_register_g_packet_guesses (gdbarch);
|
||
|
||
frame_base_set_default (gdbarch, µblaze_frame_base);
|
||
|
||
/* Hook in ABI-specific overrides, if they have been registered. */
|
||
gdbarch_init_osabi (info, gdbarch);
|
||
|
||
/* Unwind the frame. */
|
||
dwarf2_append_unwinders (gdbarch);
|
||
frame_unwind_append_unwinder (gdbarch, µblaze_frame_unwind);
|
||
frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
|
||
if (tdesc_data != NULL)
|
||
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
|
||
|
||
return gdbarch;
|
||
}
|
||
|
||
/* Provide a prototype to silence -Wmissing-prototypes. */
|
||
void _initialize_microblaze_tdep (void);
|
||
|
||
void
|
||
_initialize_microblaze_tdep (void)
|
||
{
|
||
register_gdbarch_init (bfd_arch_microblaze, microblaze_gdbarch_init);
|
||
|
||
initialize_tdesc_microblaze_with_stack_protect ();
|
||
initialize_tdesc_microblaze ();
|
||
/* Debug this files internals. */
|
||
add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
|
||
µblaze_debug_flag, _("\
|
||
Set microblaze debugging."), _("\
|
||
Show microblaze debugging."), _("\
|
||
When non-zero, microblaze specific debugging is enabled."),
|
||
NULL,
|
||
NULL,
|
||
&setdebuglist, &showdebuglist);
|
||
|
||
}
|