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gdb/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 Provide and use sparc32 and sparc64 target description XML files. * features/sparc/sparc32-cp0.xml, features/sparc/sparc32-cpu.xml, features/sparc/sparc32-fpu.xml: New files for sparc 32-bit. * features/sparc/sparc64-cp0.xml, features/sparc/sparc64-cpu.xml, features/sparc/sparc64-fpu.xml: New files for sparc 64-bit. * features/sparc/sparc32-solaris.xml: New file. * features/sparc/sparc64-solaris.xml: New file. * features/sparc/sparc32-solaris.c: Generated. * features/sparc/sparc64-solaris.c: Generated. * sparc-tdep.h: Account for differences in target descriptions. * sparc-tdep.c (sparc32_register_name): Use target provided registers. (sparc32_register_type): Use target provided registers. (validate_tdesc_registers): New function. (sparc32_gdbarch_init): Use tdesc_has_registers. Set pseudoregister functions. * sparc64-tdep.c (sparc64_register_name): Use target provided registers. (sparc64_register_type): Use target provided registers. (sparc64_init_abi): Set pseudoregister functions. gdb/doc/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 * gdb.texinfo: (Standard Target Features): Document SPARC features. (Sparc Features): New node. gdb/testsuite/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 * gdb.xml/tdesc-regs.exp: Provide sparc core registers for the tests.
43 lines
2.2 KiB
XML
43 lines
2.2 KiB
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2013-2017 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.sparc.cpu">
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<reg name="g0" bitsize="32" type="uint32" regnum="0"/>
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<reg name="g1" bitsize="32" type="uint32" regnum="1"/>
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<reg name="g2" bitsize="32" type="uint32" regnum="2"/>
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<reg name="g3" bitsize="32" type="uint32" regnum="3"/>
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<reg name="g4" bitsize="32" type="uint32" regnum="4"/>
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<reg name="g5" bitsize="32" type="uint32" regnum="5"/>
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<reg name="g6" bitsize="32" type="uint32" regnum="6"/>
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<reg name="g7" bitsize="32" type="uint32" regnum="7"/>
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<reg name="o0" bitsize="32" type="uint32" regnum="8"/>
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<reg name="o1" bitsize="32" type="uint32" regnum="9"/>
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<reg name="o2" bitsize="32" type="uint32" regnum="10"/>
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<reg name="o3" bitsize="32" type="uint32" regnum="11"/>
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<reg name="o4" bitsize="32" type="uint32" regnum="12"/>
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<reg name="o5" bitsize="32" type="uint32" regnum="13"/>
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<reg name="sp" bitsize="32" type="uint32" regnum="14"/>
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<reg name="o7" bitsize="32" type="uint32" regnum="15"/>
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<reg name="l0" bitsize="32" type="uint32" regnum="16"/>
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<reg name="l1" bitsize="32" type="uint32" regnum="17"/>
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<reg name="l2" bitsize="32" type="uint32" regnum="18"/>
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<reg name="l3" bitsize="32" type="uint32" regnum="19"/>
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<reg name="l4" bitsize="32" type="uint32" regnum="20"/>
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<reg name="l5" bitsize="32" type="uint32" regnum="21"/>
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<reg name="l6" bitsize="32" type="uint32" regnum="22"/>
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<reg name="l7" bitsize="32" type="uint32" regnum="23"/>
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<reg name="i0" bitsize="32" type="uint32" regnum="24"/>
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<reg name="i1" bitsize="32" type="uint32" regnum="25"/>
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<reg name="i2" bitsize="32" type="uint32" regnum="26"/>
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<reg name="i3" bitsize="32" type="uint32" regnum="27"/>
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<reg name="i4" bitsize="32" type="uint32" regnum="28"/>
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<reg name="i5" bitsize="32" type="uint32" regnum="29"/>
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<reg name="fp" bitsize="32" type="uint32" regnum="30"/>
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<reg name="i7" bitsize="32" type="uint32" regnum="31"/>
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</feature>
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