mirror of
https://sourceware.org/git/binutils-gdb.git
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aa137e4d51
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
163 lines
3.8 KiB
Makefile
163 lines
3.8 KiB
Makefile
#source: eh5.s
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#source: eh5a.s
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#source: eh5b.s
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#ld:
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#readelf: -wf
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#target: cfi
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#notarget: alpha* hppa64* tile*
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Contents of the .eh_frame section:
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00000000 0000001[04] 00000000 CIE
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Version: 1
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Augmentation: "zR"
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Code alignment factor: .*
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Data alignment factor: .*
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Return address column: .*
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Augmentation data: (0b|1b)
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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#...
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0000001[48] 00000014 0000001[8c] FDE cie=00000000 pc=.*
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000000(2c|30) 00000014 00000000 CIE
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Version: 1
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Augmentation: "zPR"
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Code alignment factor: .*
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Data alignment factor: .*
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Return address column: .*
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Augmentation data: 03 .. .. .. .. (0b|1b)
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DW_CFA_nop
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0000004[48] 00000014 0000001c FDE cie=000000(2c|30) pc=.*
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000000(5c|60) 00000014 0000006[04] FDE cie=00000000 pc=.*
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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0000007[48] 0000001[8c] 00000000 CIE
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Version: 1
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Augmentation: "zPLR"
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Code alignment factor: .*
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Data alignment factor: .*
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Return address column: .*
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Augmentation data: 03 .. .. .. .. 0c (0b|1b)
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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#...
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0000009[08] 0000001c 0000002[04] FDE cie=0000007[48] pc=.*
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Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef)
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000000b[08] 0000001[04] 00000000 CIE
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Version: 1
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Augmentation: "zR"
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Code alignment factor: .*
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Data alignment factor: .*
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Return address column: .*
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Augmentation data: (0b|1b)
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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#...
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000000(c4|d0) 0000001[04] 0000001[8c] FDE cie=000000b[08] pc=.*
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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#...
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000000[de]8 00000014 00000000 CIE
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Version: 1
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Augmentation: "zPR"
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Code alignment factor: .*
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Data alignment factor: .*
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Return address column: .*
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Augmentation data: 03 .. .. .. .. (0b|1b)
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DW_CFA_nop
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00000(0f|10)0 00000014 0000001c FDE cie=000000[de]8 pc=.*
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000001[01]8 0000001[04] 000000(5c|64) FDE cie=000000b[08] pc=.*
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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#...
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000001(1c|30) 0000001[8c] 00000000 CIE
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Version: 1
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Augmentation: "zPLR"
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Code alignment factor: .*
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Data alignment factor: .*
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Return address column: .*
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Augmentation data: 03 .. .. .. .. 0c (0b|1b)
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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#...
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000001(38|50) 0000001c 0000002[04] FDE cie=000001(1c|30) pc=.*
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Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef)
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000001(58|70) 00000014 000001(5c|74) FDE cie=00000000 pc=.*
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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#...
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000001(70|88) 00000014 00000(01c|148|15c) FDE cie=00000(02c|030|170) pc=.*
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000001(88|a0) 00000014 000001(8c|a4) FDE cie=00000000 pc=.*
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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#...
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000001(a0|b8|d4) 0000001c 00000(020|130|144) FDE cie=00000(074|078|1b8) pc=.*
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Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef)
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DW_CFA_advance_loc: 4 to .*
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DW_CFA_def_cfa: r0( \([er]ax\)|) ofs 16
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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