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https://sourceware.org/git/binutils-gdb.git
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fdbe2eb720
improved architecture detection. * ld-arm/arm-app.d: Likewise. * ld-arm/arm-lib-plt32.d: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-static-app.d: Likewise. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/farcall-mixed-app-v5.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-descrelax-be32.d: Likewise. * ld-arm/tls-descrelax.d: Likewise. * ld-arm/tls-descseq.d: Likewise. * ld-arm/tls-gdesc-got.d: Likewise. * ld-arm/tls-gdesc.d: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib-loc.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-thumb1.d: Likewise.
86 lines
2.4 KiB
Makefile
86 lines
2.4 KiB
Makefile
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tmpdir/farcall-mixed-app-v5: file format elf32-(little|big)arm
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architecture: armv4t, flags 0x00000112:
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EXEC_P, HAS_SYMS, D_PAGED
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start address 0x.*
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Disassembly of section .plt:
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.* <.plt>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x28>
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .*
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.*: e28fc6.* add ip, pc, #.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.*: e28fc6.* add ip, pc, #.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <_start>:
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: eb000008 bl .* <__app_func_veneer>
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.*: ebfffff5 bl .* <_start-0x18>
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.*: ebfffff1 bl .* <_start-0x24>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e1a00000 nop ; \(mov r0, r0\)
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.* <app_tfunc_close>:
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.*: b500 push {lr}
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.*: f7ff efdc blx .* <_start-0x24>
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.*: bd00 pop {pc}
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.*: 4770 bx lr
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.* <__app_func_veneer>:
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.*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__app_func_veneer\+0x4>
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.*: 02100000 .word 0x02100000
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Disassembly of section .far_arm:
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.* <app_func>:
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: eb000008 bl .* <__lib_func1_veneer>
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.*: eb000009 bl .* <__lib_func2_veneer>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e1a00000 nop ; \(mov r0, r0\)
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.*: e1a00000 nop ; \(mov r0, r0\)
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.* <app_func2>:
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.*: e12fff1e bx lr
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.*: e1a00000 nop ; \(mov r0, r0\)
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.*: e1a00000 nop ; \(mov r0, r0\)
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.*: e1a00000 nop ; \(mov r0, r0\)
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.* <__lib_func1_veneer>:
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.*: e51ff004 ldr pc, \[pc, #-4\] ; 2100034 <__lib_func1_veneer\+0x4>
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.*: 000081e8 .word 0x000081e8
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.* <__lib_func2_veneer>:
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.*: e51ff004 ldr pc, \[pc, #-4\] ; 210003c <__lib_func2_veneer\+0x4>
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.*: 000081dc .word 0x000081dc
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Disassembly of section .far_thumb:
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.* <app_tfunc>:
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.*: b500 push {lr}
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.*: f000 e806 blx .* <__lib_func2_from_thumb>
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.*: bd00 pop {pc}
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.*: 4770 bx lr
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.* <__lib_func2_from_thumb>:
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.*: e51ff004 ldr pc, \[pc, #-4\] ; 2200014 <__lib_func2_from_thumb\+0x4>
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.*: 000081dc .word 0x000081dc
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