mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-15 04:31:49 +08:00
8517f62b16
o Provide poll_quit callback to simulators so that they can poll for SIGINT on clueless OS's. o Add sim_stop to simulators so that clients can request a halt (eg gdbtk's STOP button) Works for PPC! o Re-arange remote-sim.c so that the hard work is moved from gdbsim_resume() to gdbsim_wait() (where it should be).
941 lines
23 KiB
C
941 lines
23 KiB
C
#include <signal.h>
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#include "sysdep.h"
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#include "bfd.h"
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#include "callback.h"
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#include "remote-sim.h"
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#include "d10v_sim.h"
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#define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
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#define DMEM_SIZE 16 /* Data memory is 64K (but only 32K internal RAM) */
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#define UMEM_SIZE 17 /* each unified memory region is 17 bits */
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enum _leftright { LEFT_FIRST, RIGHT_FIRST };
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static char *myname;
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static SIM_OPEN_KIND sim_kind;
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static bfd_vma start_address;
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int d10v_debug;
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host_callback *d10v_callback;
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unsigned long ins_type_counters[ (int)INS_MAX ];
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uint16 OP[4];
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static int init_text_p = 0;
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/* non-zero if we opened prog_bfd */
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static int prog_bfd_was_opened_p;
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bfd *prog_bfd;
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asection *text;
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bfd_vma text_start;
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bfd_vma text_end;
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static long hash PARAMS ((long insn, int format));
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static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));
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static void get_operands PARAMS ((struct simops *s, uint32 ins));
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static void do_long PARAMS ((uint32 ins));
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static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright));
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static void do_parallel PARAMS ((uint16 ins1, uint16 ins2));
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static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value));
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extern void sim_size PARAMS ((int power));
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static void init_system PARAMS ((void));
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extern void sim_set_profile PARAMS ((int n));
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extern void sim_set_profile_size PARAMS ((int n));
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#ifndef INLINE
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#if defined(__GNUC__) && defined(__OPTIMIZE__)
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#define INLINE __inline__
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#else
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#define INLINE
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#endif
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#endif
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#define MAX_HASH 63
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struct hash_entry
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{
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struct hash_entry *next;
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long opcode;
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long mask;
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int size;
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struct simops *ops;
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};
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struct hash_entry hash_table[MAX_HASH+1];
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INLINE static long
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hash(insn, format)
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long insn;
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int format;
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{
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if (format & LONG_OPCODE)
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return ((insn & 0x3F000000) >> 24);
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else
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return((insn & 0x7E00) >> 9);
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}
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INLINE static struct hash_entry *
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lookup_hash (ins, size)
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uint32 ins;
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int size;
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{
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struct hash_entry *h;
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if (size)
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h = &hash_table[(ins & 0x3F000000) >> 24];
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else
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h = &hash_table[(ins & 0x7E00) >> 9];
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while ((ins & h->mask) != h->opcode || h->size != size)
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{
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if (h->next == NULL)
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR looking up hash for %x at PC %x\n",ins, PC);
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exit (1);
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}
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h = h->next;
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}
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return (h);
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}
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INLINE static void
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get_operands (struct simops *s, uint32 ins)
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{
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int i, shift, bits, flags;
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uint32 mask;
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for (i=0; i < s->numops; i++)
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{
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shift = s->operands[3*i];
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bits = s->operands[3*i+1];
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flags = s->operands[3*i+2];
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mask = 0x7FFFFFFF >> (31 - bits);
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OP[i] = (ins >> shift) & mask;
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}
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}
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bfd_vma
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decode_pc ()
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{
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asection *s;
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if (!init_text_p)
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{
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init_text_p = 1;
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for (s = prog_bfd->sections; s; s = s->next)
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if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0)
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{
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text = s;
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text_start = bfd_get_section_vma (prog_bfd, s);
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text_end = text_start + bfd_section_size (prog_bfd, s);
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break;
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}
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}
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return (PC << 2) + text_start;
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}
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static void
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do_long (ins)
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uint32 ins;
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{
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struct hash_entry *h;
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
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(*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins);
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#endif
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h = lookup_hash (ins, 1);
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get_operands (h->ops, ins);
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State.ins_type = INS_LONG;
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ins_type_counters[ (int)State.ins_type ]++;
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(h->ops->func)();
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}
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static void
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do_2_short (ins1, ins2, leftright)
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uint16 ins1, ins2;
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enum _leftright leftright;
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{
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struct hash_entry *h;
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reg_t orig_pc = PC;
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enum _ins_type first, second;
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
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(*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n",
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ins1, (leftright) ? "left" : "right", ins2);
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#endif
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if (leftright == LEFT_FIRST)
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{
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first = INS_LEFT;
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second = INS_RIGHT;
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ins_type_counters[ (int)INS_LEFTRIGHT ]++;
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}
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else
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{
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first = INS_RIGHT;
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second = INS_LEFT;
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ins_type_counters[ (int)INS_RIGHTLEFT ]++;
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}
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h = lookup_hash (ins1, 0);
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get_operands (h->ops, ins1);
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State.ins_type = first;
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ins_type_counters[ (int)State.ins_type ]++;
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(h->ops->func)();
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/* If the PC has changed (ie, a jump), don't do the second instruction */
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if (orig_pc == PC && !State.exception)
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{
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h = lookup_hash (ins2, 0);
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get_operands (h->ops, ins2);
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State.ins_type = second;
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ins_type_counters[ (int)State.ins_type ]++;
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ins_type_counters[ (int)INS_CYCLES ]++;
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(h->ops->func)();
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}
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else if (orig_pc != PC && !State.exception)
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ins_type_counters[ (int)INS_COND_JUMP ]++;
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}
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static void
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do_parallel (ins1, ins2)
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uint16 ins1, ins2;
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{
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struct hash_entry *h1, *h2;
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
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(*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2);
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#endif
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ins_type_counters[ (int)INS_PARALLEL ]++;
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h1 = lookup_hash (ins1, 0);
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h2 = lookup_hash (ins2, 0);
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if (h1->ops->exec_type == PARONLY)
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{
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get_operands (h1->ops, ins1);
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State.ins_type = INS_LEFT_COND_TEST;
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ins_type_counters[ (int)State.ins_type ]++;
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(h1->ops->func)();
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if (State.exe)
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{
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ins_type_counters[ (int)INS_COND_TRUE ]++;
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get_operands (h2->ops, ins2);
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State.ins_type = INS_RIGHT_COND_EXE;
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ins_type_counters[ (int)State.ins_type ]++;
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(h2->ops->func)();
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}
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else
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ins_type_counters[ (int)INS_COND_FALSE ]++;
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}
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else if (h2->ops->exec_type == PARONLY)
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{
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get_operands (h2->ops, ins2);
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State.ins_type = INS_RIGHT_COND_TEST;
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ins_type_counters[ (int)State.ins_type ]++;
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(h2->ops->func)();
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if (State.exe)
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{
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ins_type_counters[ (int)INS_COND_TRUE ]++;
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get_operands (h1->ops, ins1);
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State.ins_type = INS_LEFT_COND_EXE;
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ins_type_counters[ (int)State.ins_type ]++;
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(h1->ops->func)();
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}
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else
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ins_type_counters[ (int)INS_COND_FALSE ]++;
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}
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else
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{
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get_operands (h1->ops, ins1);
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State.ins_type = INS_LEFT_PARALLEL;
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ins_type_counters[ (int)State.ins_type ]++;
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(h1->ops->func)();
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if (!State.exception)
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{
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get_operands (h2->ops, ins2);
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State.ins_type = INS_RIGHT_PARALLEL;
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ins_type_counters[ (int)State.ins_type ]++;
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(h2->ops->func)();
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}
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}
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}
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static char *
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add_commas(buf, sizeof_buf, value)
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char *buf;
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int sizeof_buf;
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unsigned long value;
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{
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int comma = 3;
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char *endbuf = buf + sizeof_buf - 1;
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*--endbuf = '\0';
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do {
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if (comma-- == 0)
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{
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*--endbuf = ',';
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comma = 2;
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}
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*--endbuf = (value % 10) + '0';
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} while ((value /= 10) != 0);
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return endbuf;
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}
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void
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sim_size (power)
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int power;
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{
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int i;
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if (State.imem)
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{
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for (i=0;i<128;i++)
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{
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if (State.umem[i])
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{
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free (State.umem[i]);
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State.umem[i] = NULL;
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}
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}
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free (State.imem);
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free (State.dmem);
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}
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State.imem = (uint8 *)calloc(1,1<<IMEM_SIZE);
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State.dmem = (uint8 *)calloc(1,1<<DMEM_SIZE);
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for (i=1;i<127;i++)
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State.umem[i] = NULL;
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State.umem[0] = (uint8 *)calloc(1,1<<UMEM_SIZE);
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State.umem[1] = (uint8 *)calloc(1,1<<UMEM_SIZE);
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State.umem[2] = (uint8 *)calloc(1,1<<UMEM_SIZE);
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State.umem[127] = (uint8 *)calloc(1,1<<UMEM_SIZE);
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if (!State.imem || !State.dmem || !State.umem[0] || !State.umem[1] || !State.umem[2] || !State.umem[127] )
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "Memory allocation failed.\n");
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exit(1);
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}
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SET_IMAP0(0x1000);
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SET_IMAP1(0x1000);
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SET_DMAP(0);
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_MEMSIZE) != 0)
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{
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char buffer[20];
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(*d10v_callback->printf_filtered) (d10v_callback,
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"Allocated %s bytes instruction memory and\n",
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add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)));
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(*d10v_callback->printf_filtered) (d10v_callback, " %s bytes data memory.\n",
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add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)));
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}
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#endif
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}
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static void
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init_system ()
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{
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if (!State.imem)
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sim_size(1);
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}
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static int
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xfer_mem (addr, buffer, size, write)
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SIM_ADDR addr;
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unsigned char *buffer;
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int size;
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int write;
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{
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if (!State.imem)
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init_system ();
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
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{
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if (write)
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(*d10v_callback->printf_filtered) (d10v_callback, "sim_write %d bytes to 0x%x\n", size, addr);
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else
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(*d10v_callback->printf_filtered) (d10v_callback, "sim_read %d bytes from 0x%x\n", size, addr);
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}
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#endif
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/* to access data, we use the following mapping */
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/* 0x01000000 - 0x0103ffff : instruction memory */
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/* 0x02000000 - 0x0200ffff : data memory */
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/* 0x00000000 - 0x00ffffff : unified memory */
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if ( (addr & 0x03000000) == 0)
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{
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/* UNIFIED MEMORY */
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int segment;
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segment = addr >> UMEM_SIZE;
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addr &= 0x1ffff;
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if (!State.umem[segment])
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{
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#ifdef DEBUG
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(*d10v_callback->printf_filtered) (d10v_callback,"Allocating %s bytes unified memory to region %d\n",
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add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)), segment);
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#endif
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State.umem[segment] = (uint8 *)calloc(1,1<<UMEM_SIZE);
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}
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if (!State.umem[segment])
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "Memory allocation failed.\n");
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exit(1);
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}
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/* FIXME: need to check size and read/write multiple segments if necessary */
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if (write)
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memcpy (State.umem[segment]+addr, buffer, size) ;
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else
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memcpy (buffer, State.umem[segment]+addr, size);
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}
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else if ( (addr & 0x03000000) == 0x02000000)
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{
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/* DATA MEMORY */
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addr &= ~0x02000000;
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if (size > (1<<(DMEM_SIZE-1)))
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: data section is only %d bytes.\n",1<<(DMEM_SIZE-1));
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exit(1);
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}
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if (write)
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memcpy (State.dmem+addr, buffer, size);
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else
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memcpy (buffer, State.dmem+addr, size);
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}
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else if ( (addr & 0x03000000) == 0x01000000)
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{
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/* INSTRUCTION MEMORY */
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addr &= ~0x01000000;
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if (size > (1<<IMEM_SIZE))
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: inst section is only %d bytes.\n",1<<IMEM_SIZE);
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exit(1);
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}
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if (write)
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memcpy (State.imem+addr, buffer, size);
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else
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memcpy (buffer, State.imem+addr, size);
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}
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else if (write)
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: address 0x%x is not in valid range\n",addr);
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(*d10v_callback->printf_filtered) (d10v_callback, "Instruction addresses start at 0x01000000\n");
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(*d10v_callback->printf_filtered) (d10v_callback, "Data addresses start at 0x02000000\n");
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(*d10v_callback->printf_filtered) (d10v_callback, "Unified addresses start at 0x00000000\n");
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exit(1);
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}
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else
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return 0;
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return size;
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}
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int
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sim_write (sd, addr, buffer, size)
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SIM_DESC sd;
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SIM_ADDR addr;
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unsigned char *buffer;
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int size;
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{
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return xfer_mem( addr, buffer, size, 1);
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}
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int
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sim_read (sd, addr, buffer, size)
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SIM_DESC sd;
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SIM_ADDR addr;
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unsigned char *buffer;
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int size;
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{
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return xfer_mem( addr, buffer, size, 0);
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}
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SIM_DESC
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sim_open (kind, argv)
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SIM_OPEN_KIND kind;
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char **argv;
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{
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struct simops *s;
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struct hash_entry *h;
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static int init_p = 0;
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char **p;
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sim_kind = kind;
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myname = argv[0];
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for (p = argv + 1; *p; ++p)
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{
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/* Ignore endian specification. */
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if (strcmp (*p, "-E") == 0)
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++p;
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else
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#ifdef DEBUG
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if (strcmp (*p, "-t") == 0)
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d10v_debug = DEBUG;
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else
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#endif
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p);
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}
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/* put all the opcodes in the hash table */
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if (!init_p++)
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{
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for (s = Simops; s->func; s++)
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{
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h = &hash_table[hash(s->opcode,s->format)];
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/* go to the last entry in the chain */
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while (h->next)
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h = h->next;
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if (h->ops)
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{
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h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
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if (!h->next)
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perror ("malloc failure");
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h = h->next;
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}
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h->ops = s;
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h->mask = s->mask;
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h->opcode = s->opcode;
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h->size = s->is_long;
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}
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}
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/* Fudge our descriptor. */
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return (SIM_DESC) 1;
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}
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void
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sim_close (sd, quitting)
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|
SIM_DESC sd;
|
|
int quitting;
|
|
{
|
|
if (prog_bfd != NULL && prog_bfd_was_opened_p)
|
|
bfd_close (prog_bfd);
|
|
}
|
|
|
|
void
|
|
sim_set_profile (n)
|
|
int n;
|
|
{
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n);
|
|
}
|
|
|
|
void
|
|
sim_set_profile_size (n)
|
|
int n;
|
|
{
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n);
|
|
}
|
|
|
|
|
|
uint8 *
|
|
dmem_addr( addr )
|
|
uint32 addr;
|
|
{
|
|
int seg;
|
|
|
|
addr &= 0xffff;
|
|
|
|
if (addr > 0xbfff)
|
|
{
|
|
if ( (addr & 0xfff0) != 0xff00)
|
|
{
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "Data address 0x%lx is in I/O space, pc = 0x%lx.\n",
|
|
(long)addr, (long)decode_pc ());
|
|
State.exception = SIGBUS;
|
|
}
|
|
|
|
return State.dmem + addr;
|
|
}
|
|
|
|
if (addr > 0x7fff)
|
|
{
|
|
if (DMAP & 0x1000)
|
|
{
|
|
/* instruction memory */
|
|
return (DMAP & 0xf) * 0x4000 + State.imem;
|
|
}
|
|
/* unified memory */
|
|
/* this is ugly because we allocate unified memory in 128K segments and */
|
|
/* dmap addresses 16k segments */
|
|
seg = (DMAP & 0x3ff) >> 3;
|
|
if (State.umem[seg] == NULL)
|
|
{
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n",
|
|
seg, (long)decode_pc ());
|
|
State.exception = SIGBUS;
|
|
}
|
|
return State.umem[seg] + (DMAP & 7) * 0x4000;
|
|
}
|
|
|
|
return State.dmem + addr;
|
|
}
|
|
|
|
|
|
static uint8 *
|
|
pc_addr()
|
|
{
|
|
uint32 pc = ((uint32)PC) << 2;
|
|
uint16 imap;
|
|
|
|
if (pc & 0x20000)
|
|
imap = IMAP1;
|
|
else
|
|
imap = IMAP0;
|
|
|
|
if (imap & 0x1000)
|
|
return State.imem + pc;
|
|
|
|
if (State.umem[imap & 0xff] == NULL)
|
|
{
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n",
|
|
imap & 0xff, (long)PC);
|
|
State.exception = SIGBUS;
|
|
return 0;
|
|
}
|
|
|
|
return State.umem[imap & 0xff] + pc;
|
|
}
|
|
|
|
|
|
static int stop_simulator;
|
|
|
|
static void
|
|
sim_ctrl_c()
|
|
{
|
|
stop_simulator = 1;
|
|
}
|
|
|
|
|
|
int
|
|
sim_stop (sd)
|
|
SIM_DESC sd;
|
|
{
|
|
stop_simulator = 1;
|
|
return 1;
|
|
}
|
|
|
|
|
|
/* Run (or resume) the program. */
|
|
void
|
|
sim_resume (sd, step, siggnal)
|
|
SIM_DESC sd;
|
|
int step, siggnal;
|
|
{
|
|
void (*prev) ();
|
|
uint32 inst;
|
|
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
|
|
State.exception = 0;
|
|
prev = signal(SIGINT, sim_ctrl_c);
|
|
stop_simulator = step;
|
|
|
|
do
|
|
{
|
|
inst = get_longword( pc_addr() );
|
|
State.pc_changed = 0;
|
|
ins_type_counters[ (int)INS_CYCLES ]++;
|
|
switch (inst & 0xC0000000)
|
|
{
|
|
case 0xC0000000:
|
|
/* long instruction */
|
|
do_long (inst & 0x3FFFFFFF);
|
|
break;
|
|
case 0x80000000:
|
|
/* R -> L */
|
|
do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, 0);
|
|
break;
|
|
case 0x40000000:
|
|
/* L -> R */
|
|
do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, 1);
|
|
break;
|
|
case 0:
|
|
do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
|
|
break;
|
|
}
|
|
|
|
if (State.RP && PC == RPT_E)
|
|
{
|
|
RPT_C -= 1;
|
|
if (RPT_C == 0)
|
|
State.RP = 0;
|
|
else
|
|
PC = RPT_S;
|
|
}
|
|
else if (!State.pc_changed)
|
|
PC++;
|
|
}
|
|
while ( !State.exception && !stop_simulator);
|
|
|
|
if (step && !State.exception)
|
|
State.exception = SIGTRAP;
|
|
|
|
signal(SIGINT, prev);
|
|
}
|
|
|
|
int
|
|
sim_trace (sd)
|
|
SIM_DESC sd;
|
|
{
|
|
#ifdef DEBUG
|
|
d10v_debug = DEBUG;
|
|
#endif
|
|
sim_resume (sd, 0, 0);
|
|
return 1;
|
|
}
|
|
|
|
void
|
|
sim_info (sd, verbose)
|
|
SIM_DESC sd;
|
|
int verbose;
|
|
{
|
|
char buf1[40];
|
|
char buf2[40];
|
|
char buf3[40];
|
|
char buf4[40];
|
|
char buf5[40];
|
|
unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ];
|
|
unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ];
|
|
unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ];
|
|
unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ];
|
|
unsigned long left_total = left + left_parallel + left_cond + left_nops;
|
|
|
|
unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ];
|
|
unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ];
|
|
unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ];
|
|
unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ];
|
|
unsigned long right_total = right + right_parallel + right_cond + right_nops;
|
|
|
|
unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ];
|
|
unsigned long ins_long = ins_type_counters[ (int)INS_LONG ];
|
|
unsigned long parallel = ins_type_counters[ (int)INS_PARALLEL ];
|
|
unsigned long leftright = ins_type_counters[ (int)INS_LEFTRIGHT ];
|
|
unsigned long rightleft = ins_type_counters[ (int)INS_RIGHTLEFT ];
|
|
unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ];
|
|
unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ];
|
|
unsigned long cond_jump = ins_type_counters[ (int)INS_COND_JUMP ];
|
|
unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ];
|
|
unsigned long total = (unknown + left_total + right_total + ins_long);
|
|
|
|
int size = strlen (add_commas (buf1, sizeof (buf1), total));
|
|
int parallel_size = strlen (add_commas (buf1, sizeof (buf1),
|
|
(left_parallel > right_parallel) ? left_parallel : right_parallel));
|
|
int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond));
|
|
int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops));
|
|
int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right));
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
|
|
size, add_commas (buf1, sizeof (buf1), left_total),
|
|
normal_size, add_commas (buf2, sizeof (buf2), left),
|
|
parallel_size, add_commas (buf3, sizeof (buf3), left_parallel),
|
|
cond_size, add_commas (buf4, sizeof (buf4), left_cond),
|
|
nop_size, add_commas (buf5, sizeof (buf5), left_nops));
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
|
|
size, add_commas (buf1, sizeof (buf1), right_total),
|
|
normal_size, add_commas (buf2, sizeof (buf2), right),
|
|
parallel_size, add_commas (buf3, sizeof (buf3), right_parallel),
|
|
cond_size, add_commas (buf4, sizeof (buf4), right_cond),
|
|
nop_size, add_commas (buf5, sizeof (buf5), right_nops));
|
|
|
|
if (ins_long)
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s long instruction(s)\n",
|
|
size, add_commas (buf1, sizeof (buf1), ins_long));
|
|
|
|
if (parallel)
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s parallel instruction(s)\n",
|
|
size, add_commas (buf1, sizeof (buf1), parallel));
|
|
|
|
if (leftright)
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s instruction(s) encoded L->R\n",
|
|
size, add_commas (buf1, sizeof (buf1), leftright));
|
|
|
|
if (rightleft)
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s instruction(s) encoded R->L\n",
|
|
size, add_commas (buf1, sizeof (buf1), rightleft));
|
|
|
|
if (unknown)
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s unknown instruction(s)\n",
|
|
size, add_commas (buf1, sizeof (buf1), unknown));
|
|
|
|
if (cond_true)
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s instruction(s) due to EXExxx condition being true\n",
|
|
size, add_commas (buf1, sizeof (buf1), cond_true));
|
|
|
|
if (cond_false)
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"skipped %*s instruction(s) due to EXExxx condition being false\n",
|
|
size, add_commas (buf1, sizeof (buf1), cond_false));
|
|
|
|
if (cond_jump)
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"skipped %*s instruction(s) due to conditional branch succeeding\n",
|
|
size, add_commas (buf1, sizeof (buf1), cond_jump));
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s cycle(s)\n",
|
|
size, add_commas (buf1, sizeof (buf1), cycles));
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
"executed %*s total instructions\n",
|
|
size, add_commas (buf1, sizeof (buf1), total));
|
|
}
|
|
|
|
SIM_RC
|
|
sim_create_inferior (sd, argv, env)
|
|
SIM_DESC sd;
|
|
char **argv;
|
|
char **env;
|
|
{
|
|
#ifdef DEBUG
|
|
if (d10v_debug)
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%x\n", start_address);
|
|
#endif
|
|
|
|
/* reset all state information */
|
|
memset (&State.regs, 0, (int)&State.imem - (int)&State.regs[0]);
|
|
|
|
/* set PC */
|
|
PC = start_address >> 2;
|
|
|
|
/* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */
|
|
/* resets imap0 and imap1 to 0x1000. */
|
|
|
|
SET_IMAP0(0x1000);
|
|
SET_IMAP1(0x1000);
|
|
SET_DMAP(0);
|
|
|
|
return SIM_RC_OK;
|
|
}
|
|
|
|
|
|
void
|
|
sim_kill (sd)
|
|
SIM_DESC sd;
|
|
{
|
|
/* nothing to do */
|
|
}
|
|
|
|
void
|
|
sim_set_callbacks (sd, p)
|
|
SIM_DESC sd;
|
|
host_callback *p;
|
|
{
|
|
d10v_callback = p;
|
|
}
|
|
|
|
void
|
|
sim_stop_reason (sd, reason, sigrc)
|
|
SIM_DESC sd;
|
|
enum sim_stop *reason;
|
|
int *sigrc;
|
|
{
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
|
|
|
|
switch (State.exception)
|
|
{
|
|
case SIG_D10V_STOP: /* stop instruction */
|
|
*reason = sim_exited;
|
|
*sigrc = 0;
|
|
break;
|
|
|
|
case SIG_D10V_EXIT: /* exit trap */
|
|
*reason = sim_exited;
|
|
*sigrc = State.regs[2];
|
|
break;
|
|
|
|
default: /* some signal */
|
|
*reason = sim_stopped;
|
|
*sigrc = State.exception;
|
|
break;
|
|
}
|
|
}
|
|
|
|
void
|
|
sim_fetch_register (sd, rn, memory)
|
|
SIM_DESC sd;
|
|
int rn;
|
|
unsigned char *memory;
|
|
{
|
|
if (!State.imem)
|
|
init_system();
|
|
|
|
if (rn > 34)
|
|
WRITE_64 (memory, State.a[rn-35]);
|
|
else if (rn == 32)
|
|
WRITE_16 (memory, IMAP0);
|
|
else if (rn == 33)
|
|
WRITE_16 (memory, IMAP1);
|
|
else if (rn == 34)
|
|
WRITE_16 (memory, DMAP);
|
|
else
|
|
WRITE_16 (memory, State.regs[rn]);
|
|
}
|
|
|
|
void
|
|
sim_store_register (sd, rn, memory)
|
|
SIM_DESC sd;
|
|
int rn;
|
|
unsigned char *memory;
|
|
{
|
|
if (!State.imem)
|
|
init_system();
|
|
|
|
if (rn > 34)
|
|
State.a[rn-35] = READ_64 (memory) & MASK40;
|
|
else if (rn == 34)
|
|
SET_DMAP( READ_16(memory) );
|
|
else if (rn == 33)
|
|
SET_IMAP1( READ_16(memory) );
|
|
else if (rn == 32)
|
|
SET_IMAP0( READ_16(memory) );
|
|
else
|
|
State.regs[rn]= READ_16 (memory);
|
|
}
|
|
|
|
|
|
void
|
|
sim_do_command (sd, cmd)
|
|
SIM_DESC sd;
|
|
char *cmd;
|
|
{
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd);
|
|
}
|
|
|
|
SIM_RC
|
|
sim_load (sd, prog, abfd, from_tty)
|
|
SIM_DESC sd;
|
|
char *prog;
|
|
bfd *abfd;
|
|
int from_tty;
|
|
{
|
|
extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
|
|
|
|
if (prog_bfd != NULL && prog_bfd_was_opened_p)
|
|
bfd_close (prog_bfd);
|
|
prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd,
|
|
sim_kind == SIM_OPEN_DEBUG);
|
|
if (prog_bfd == NULL)
|
|
return SIM_RC_FAIL;
|
|
start_address = bfd_get_start_address (prog_bfd);
|
|
prog_bfd_was_opened_p = abfd == NULL;
|
|
return SIM_RC_OK;
|
|
}
|