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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
203 lines
4.3 KiB
Plaintext
203 lines
4.3 KiB
Plaintext
# frv testcase for nfdsubs $FRi,$FRj,$FRk
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# mach: fr500 fr550 frv
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.include "testutils.inc"
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float_constants
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start
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load_float_constants
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load_float_constants1
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.global nfdsubs
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nfdsubs:
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nfdsubs fr0,fr16,fr2
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test_fr_fr fr2,fr0
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test_fr_fr fr3,fr0
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr4,fr16,fr2
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test_fr_fr fr2,fr4
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test_fr_fr fr3,fr4
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr8,fr16,fr2
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test_fr_fr fr2,fr8
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test_fr_fr fr3,fr8
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr12,fr16,fr2
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test_fr_fr fr2,fr12
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test_fr_fr fr3,fr12
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr16,fr16,fr2
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test_fr_fr fr2,fr16
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test_fr_fr fr2,fr20
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test_fr_fr fr3,fr16
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test_fr_fr fr3,fr20
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr20,fr16,fr2
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test_fr_fr fr2,fr16
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test_fr_fr fr2,fr20
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test_fr_fr fr3,fr16
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test_fr_fr fr3,fr20
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr24,fr16,fr2
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test_fr_fr fr2,fr24
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test_fr_fr fr3,fr24
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr28,fr16,fr2
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test_fr_fr fr2,fr28
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test_fr_fr fr3,fr28
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr32,fr16,fr2
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test_fr_fr fr2,fr32
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test_fr_fr fr3,fr32
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr36,fr16,fr2
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test_fr_fr fr2,fr36
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test_fr_fr fr3,fr36
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr40,fr16,fr2
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test_fr_fr fr2,fr40
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test_fr_fr fr3,fr40
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr44,fr16,fr2
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test_fr_fr fr2,fr44
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test_fr_fr fr3,fr44
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr48,fr16,fr2
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test_fr_fr fr2,fr48
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test_fr_fr fr3,fr48
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr52,fr16,fr2
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test_fr_fr fr2,fr52
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test_fr_fr fr3,fr52
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr0,fr20,fr2
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test_fr_fr fr2,fr0
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test_fr_fr fr3,fr0
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr4,fr20,fr2
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test_fr_fr fr2,fr4
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test_fr_fr fr3,fr4
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr8,fr20,fr2
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test_fr_fr fr2,fr8
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test_fr_fr fr3,fr8
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr12,fr20,fr2
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test_fr_fr fr2,fr12
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test_fr_fr fr3,fr12
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr16,fr20,fr2
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test_fr_fr fr2,fr16
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test_fr_fr fr2,fr20
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test_fr_fr fr3,fr16
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test_fr_fr fr3,fr20
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr20,fr20,fr2
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test_fr_fr fr2,fr16
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test_fr_fr fr2,fr20
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test_fr_fr fr3,fr16
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test_fr_fr fr3,fr20
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr24,fr20,fr2
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test_fr_fr fr2,fr24
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test_fr_fr fr3,fr24
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr28,fr20,fr2
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test_fr_fr fr2,fr28
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test_fr_fr fr3,fr28
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr32,fr20,fr2
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test_fr_fr fr2,fr32
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test_fr_fr fr3,fr32
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr36,fr20,fr2
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test_fr_fr fr2,fr36
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test_fr_fr fr3,fr36
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr40,fr20,fr2
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test_fr_fr fr2,fr40
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test_fr_fr fr3,fr40
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr44,fr20,fr2
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test_fr_fr fr2,fr44
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test_fr_fr fr3,fr44
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr48,fr20,fr2
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test_fr_fr fr2,fr48
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test_fr_fr fr3,fr48
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr52,fr20,fr2
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test_fr_fr fr2,fr52
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test_fr_fr fr3,fr52
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr32,fr36,fr2
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test_fr_fr fr2,fr8
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test_fr_fr fr3,fr8
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr44,fr40,fr2
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test_fr_fr fr2,fr36
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test_fr_fr fr3,fr36
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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; try to cause exceptions
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nfdsubs fr4,fr28,fr2
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; test_fr_fr fr2,fr44
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; test_fr_fr fr3,fr44
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr0,fr28,fr2
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; test_fr_fr fr2,fr44
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; test_fr_fr fr3,fr44
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr56,fr28,fr2
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; test_fr_fr fr2,fr44
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; test_fr_fr fr3,fr44
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test_spr_immed 0,fner1
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test_spr_immed 0,fner0
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nfdsubs fr60,fr28,fr2
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; test_fr_fr fr2,fr44
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; test_fr_fr fr3,fr44
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test_spr_immed 0xc,fner1
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test_spr_immed 0,fner0
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pass
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