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https://sourceware.org/git/binutils-gdb.git
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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
102 lines
2.0 KiB
Plaintext
102 lines
2.0 KiB
Plaintext
# frv testcase for fteq $FCCi_2,$GRi,$GRj
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# mach: all
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.include "testutils.inc"
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start
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.global fteq
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fteq:
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and_spr_immed -4081,tbr ; clear tbr.tt
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set_gr_spr tbr,gr7
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inc_gr_immed 2112,gr7 ; address of exception handler
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set_bctrlr_0_0 gr7 ; bctrlr 0,0
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set_spr_immed 128,lcr
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set_gr_immed 0,gr7
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set_gr_immed 4,gr8
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set_spr_addr bad,lr
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set_fcc 0x0 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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set_spr_addr bad,lr
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set_fcc 0x1 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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set_spr_addr bad,lr
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set_fcc 0x2 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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set_spr_addr bad,lr
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set_fcc 0x3 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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set_spr_addr bad,lr
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set_fcc 0x4 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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set_spr_addr bad,lr
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set_fcc 0x5 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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set_spr_addr bad,lr
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set_fcc 0x6 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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set_spr_addr bad,lr
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set_fcc 0x7 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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set_psr_et 1
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set_spr_addr ok8,lr
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set_fcc 0x8 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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fail
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ok8:
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set_psr_et 1
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set_spr_addr ok9,lr
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set_fcc 0x9 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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fail
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ok9:
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set_psr_et 1
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set_spr_addr oka,lr
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set_fcc 0xa 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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fail
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oka:
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set_psr_et 1
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set_spr_addr okb,lr
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set_fcc 0xb 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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fail
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okb:
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set_psr_et 1
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set_spr_addr okc,lr
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set_fcc 0xc 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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fail
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okc:
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set_psr_et 1
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set_spr_addr okd,lr
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set_fcc 0xd 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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fail
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okd:
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set_psr_et 1
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set_spr_addr oke,lr
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set_fcc 0xe 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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fail
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oke:
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set_psr_et 1
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set_spr_addr okf,lr
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set_fcc 0xf 0
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fteq fcc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16
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fail
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okf:
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pass
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bad:
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fail
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