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Przemyslaw Wirkus 12e35da62f This patch introduces ETMv4 (Embedded Trace Macrocell) system registers for the AArch64 architecture.
gas           * testsuite/gas/aarch64/etm-ro-invalid.d: New test.
              * testsuite/gas/aarch64/etm-ro-invalid.l: New test.
              * testsuite/gas/aarch64/etm-ro-invalid.s: New test.
              * testsuite/gas/aarch64/etm-ro.s: New test.
              * testsuite/gas/aarch64/etm-wo-invalid.d: New test.
              * testsuite/gas/aarch64/etm-wo-invalid.l: New test.
              * testsuite/gas/aarch64/etm-wo-invalid.s: New test.
              * testsuite/gas/aarch64/etm-wo.s: New test.
              * testsuite/gas/aarch64/etm.s: New test.
              * testsuite/gas/aarch64/sysreg.d: system register s2_1_c0_c3_0 disassembled
              now to trcstatr.

opcodes       * aarch64-opc.c: Added ETMv4 system registers TRCACATRn, TRCACVRn,
              TRCAUTHSTATUS, TRCAUXCTLR, TRCBBCTLR, TRCCCCTLR, TRCCIDCCTLR0, TRCCIDCCTLR1,
              TRCCIDCVRn, TRCCIDR0, TRCCIDR1, TRCCIDR2, TRCCIDR3, TRCCLAIMCLR, TRCCLAIMSET,
              TRCCNTCTLRn, TRCCNTRLDVRn, TRCCNTVRn, TRCCONFIGR, TRCDEVAFF0, TRCDEVAFF1,
              TRCDEVARCH, TRCDEVID, TRCDEVTYPE, TRCDVCMRn, TRCDVCVRn, TRCEVENTCTL0R,
              TRCEVENTCTL1R, TRCEXTINSELR, TRCIDR0, TRCIDR1, TRCIDR2, TRCIDR3, TRCIDR4,
              TRCIDR5, TRCIDR6, TRCIDR7, TRCIDR8, TRCIDR9, TRCIDR10, TRCIDR11, TRCIDR12,
              TRCIDR13, TRCIMSPEC0, TRCIMSPECn, TRCITCTRL, TRCLAR WOTRCLSR, TRCOSLAR
              WOTRCOSLSR, TRCPDCR, TRCPDSR, TRCPIDR0, TRCPIDR1, TRCPIDR2, TRCPIDR3,
              TRCPIDR4, TRCPIDR[5,6,7], TRCPRGCTLR, TRCP,CSELR, TRCQCTLR, TRCRSCTLRn,
              TRCSEQEVRn, TRCSEQRSTEVR, TRCSEQSTR, TRCSSCCRn, TRCSSCSRn, TRCSSPCICRn,
              TRCSTALLCTLR, TRCSTATR, TRCSYNCPR, TRCTRACEIDR,  TRCTSCTLR, TRCVDARCCTLR,
              TRCVDCTLR, TRCVDSACCTLR, TRCVICTLR, TRCVIIECTLR, TRCVIPCSSCTLR, TRCVISSCTLR,
              TRCVMIDCCTLR0, TRCVMIDCCTLR1 and TRCVMIDCVRn.
2020-09-28 15:49:11 +01:00
bfd Re: PR26656, power10 libstdc++.so segfault in __cxxabiv1::__cxa_throw 2020-09-28 09:35:20 +09:30
binutils asan: readelf buffer overflow and abort 2020-09-25 11:55:01 +09:30
config
contrib Import mklog.py from gcc repo 2020-09-25 10:24:44 -04:00
cpu bpf: xBPF SDIV, SMOD instructions 2020-09-18 10:04:23 -07:00
elfcpp Re: Sync libiberty and include with GCC for get_DW_UT_name 2020-09-25 11:55:00 +09:30
etc
gas This patch introduces ETMv4 (Embedded Trace Macrocell) system registers for the AArch64 architecture. 2020-09-28 15:49:11 +01:00
gdb Rewrite tui_puts 2020-09-27 20:30:33 -06:00
gdbserver Handle 64bit breakpoints of WOW64 processes as SIGINT 2020-09-24 19:01:22 +02:00
gdbsupport gdb: remove file_handler typedef 2020-09-24 15:19:46 -04:00
gnulib
gold [GOLD] PPC64_OPT_LOCALENTRY is incompatible with tail calls 2020-09-26 20:34:55 +09:30
gprof
include Sync libiberty and include with GCC for get_DW_UT_name. 2020-09-24 22:55:24 +02:00
intl
ld PR26656 testcases 2020-09-28 19:36:35 +09:30
libctf
libdecnumber
libiberty Sync libiberty and include with GCC for get_DW_UT_name. 2020-09-24 22:55:24 +02:00
opcodes This patch introduces ETMv4 (Embedded Trace Macrocell) system registers for the AArch64 architecture. 2020-09-28 15:49:11 +01:00
readline
sim sim/m32r: return register sizes after fetch and store 2020-09-18 17:26:07 +01:00
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