.. |
po
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Updated French translation for the opcodes subdirectory.
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2019-06-14 11:43:53 +01:00 |
.gitignore
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aarch64-asm-2.c
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aarch64-asm.c
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[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES
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2019-07-01 15:17:22 +01:00 |
aarch64-asm.h
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aarch64-dis-2.c
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[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES
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2019-07-01 15:17:22 +01:00 |
aarch64-dis.c
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[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES
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2019-07-01 15:17:22 +01:00 |
aarch64-dis.h
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aarch64-gen.c
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aarch64-opc-2.c
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aarch64-opc.c
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[AArch64][gas] Update MTE system register encodings
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2019-08-22 10:20:01 +01:00 |
aarch64-opc.h
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aarch64-tbl.h
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[AArch64] Allow MOVPRFX to be used with FMOV
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2019-07-02 10:52:16 +01:00 |
aclocal.m4
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alpha-dis.c
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alpha-opc.c
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arc-dis.c
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Prevent objdump from aborting when asked to disassemble an unknown type of ARC binary file.
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2019-08-07 17:22:29 +01:00 |
arc-dis.h
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arc-ext-tbl.h
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[ARC] Update ARC opcode table
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2019-07-24 16:46:01 +03:00 |
arc-ext.c
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bfd_section_* macros
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2019-09-19 09:40:13 +09:30 |
arc-ext.h
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arc-fxi.h
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arc-nps400-tbl.h
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arc-opc.c
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[ARC] Update ARC opcode table
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2019-07-24 16:46:01 +03:00 |
arc-regs.h
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arc-tbl.h
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[ARC] Update ARC opcode table
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2019-07-24 16:46:01 +03:00 |
arm-dis.c
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Add support for the MVE VMOV instruction to the ARM assembler. This instruction copies the value of one vector register to another vector register. The patch also modifies the decoding of VORR instruction which is effecting decoding of VMOV instruction.
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2019-08-27 12:08:21 +01:00 |
avr-dis.c
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Fix the disassembly of the LDS and STS instructions of the AVR architecture.
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2019-10-09 13:48:06 +01:00 |
bfin-dis.c
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bpf-asm.c
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bpf-desc.c
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cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassembler
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2019-07-19 15:35:43 +02:00 |
bpf-desc.h
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bpf-dis.c
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bpf-ibld.c
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bpf-opc.c
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cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructions
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2019-07-15 16:00:28 +02:00 |
bpf-opc.h
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cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructions
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2019-07-15 16:00:28 +02:00 |
cgen-asm.c
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cgen-asm.in
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cgen-bitset.c
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cgen-dis.c
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cgen-dis.in
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cgen-ibld.in
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cgen-opc.c
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cgen.sh
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ChangeLog
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Fix potential undefined behaviour in the RX disassembler.
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2019-10-25 16:10:04 +01:00 |
ChangeLog-0001
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ChangeLog-0203
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ChangeLog-2004
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ChangeLog-2005
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ChangeLog-2006
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ChangeLog-2007
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ChangeLog-2008
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ChangeLog-2009
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ChangeLog-2010
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ChangeLog-2011
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ChangeLog-2012
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ChangeLog-2013
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ChangeLog-2014
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ChangeLog-2015
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ChangeLog-2016
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ChangeLog-2017
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ChangeLog-2018
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ChangeLog-9297
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ChangeLog-9899
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config.in
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configure
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Re-generate many configure and Makefile.in files
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2019-09-18 09:09:15 -04:00 |
configure.ac
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configure.com
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cr16-dis.c
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cr16-opc.c
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cris-dis.c
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cris-opc.c
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crx-dis.c
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crx-opc.c
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csky-dis.c
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csky-opc.h
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d10v-dis.c
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d10v-opc.c
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d30v-dis.c
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d30v-opc.c
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dep-in.sed
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dis-buf.c
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dis-init.c
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disassemble.c
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disassemble.h
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dlx-dis.c
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epiphany-asm.c
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epiphany-desc.c
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epiphany-desc.h
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epiphany-dis.c
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epiphany-ibld.c
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epiphany-opc.c
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epiphany-opc.h
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fr30-asm.c
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fr30-desc.c
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fr30-desc.h
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fr30-dis.c
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fr30-ibld.c
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fr30-opc.c
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fr30-opc.h
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frv-asm.c
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frv-desc.c
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frv-desc.h
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frv-dis.c
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frv-ibld.c
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frv-opc.c
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frv-opc.h
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ft32-dis.c
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ft32-opc.c
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h8300-dis.c
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hppa-dis.c
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i386-dis-evex-len.h
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i386: Check vector length for scatter/gather prefetch instructions
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2019-06-27 13:39:32 -07:00 |
i386-dis-evex-mod.h
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x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D}
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2019-07-01 08:23:41 +02:00 |
i386-dis-evex-prefix.h
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x86: add missing pseudo ops for VPCLMULQDQ ISA extension
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2019-07-01 08:28:58 +02:00 |
i386-dis-evex-reg.h
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i386: Break i386-dis-evex.h into small files
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2019-06-21 13:18:41 -07:00 |
i386-dis-evex-w.h
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x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D}
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2019-07-01 08:23:41 +02:00 |
i386-dis-evex.h
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i386: Break i386-dis-evex.h into small files
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2019-06-21 13:18:41 -07:00 |
i386-dis.c
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x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D}
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2019-07-01 08:23:41 +02:00 |
i386-gen.c
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x86: drop stale Mem enumerator
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2019-07-17 09:15:49 +02:00 |
i386-init.h
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x86: make RegMem an opcode modifier
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2019-07-16 09:31:36 +02:00 |
i386-opc.c
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i386-opc.h
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x86: drop stale Mem enumerator
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2019-07-17 09:15:49 +02:00 |
i386-opc.tbl
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x86/Intel: correct MOVSD and CMPSD handling
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2019-10-07 08:38:01 +02:00 |
i386-reg.tbl
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x86: fold SReg{2,3}
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2019-07-16 09:30:29 +02:00 |
i386-tbl.h
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x86/Intel: correct MOVSD and CMPSD handling
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2019-10-07 08:38:01 +02:00 |
ia64-asmtab.c
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ia64-asmtab.h
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ia64-dis.c
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ia64-gen.c
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ia64-ic.tbl
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ia64-opc-a.c
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ia64-opc-b.c
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ia64-opc-d.c
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ia64-opc-f.c
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ia64-opc-i.c
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ia64-opc-m.c
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ia64-opc-x.c
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ia64-opc.c
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ia64-opc.h
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ia64-raw.tbl
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ia64-war.tbl
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ia64-waw.tbl
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ip2k-asm.c
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ip2k-desc.c
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ip2k-desc.h
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ip2k-dis.c
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ip2k-ibld.c
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ip2k-opc.c
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ip2k-opc.h
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iq2000-asm.c
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iq2000-desc.c
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iq2000-desc.h
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iq2000-dis.c
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iq2000-ibld.c
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iq2000-opc.c
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iq2000-opc.h
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lm32-asm.c
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lm32-desc.c
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lm32-desc.h
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lm32-dis.c
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lm32-ibld.c
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lm32-opc.c
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lm32-opc.h
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lm32-opinst.c
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m32c-asm.c
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m32c-desc.c
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m32c-desc.h
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m32c-dis.c
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m32c-ibld.c
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m32c-opc.c
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m32c-opc.h
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m32r-asm.c
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m32r-desc.c
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m32r-desc.h
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m32r-dis.c
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m32r-ibld.c
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m32r-opc.c
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m32r-opc.h
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m32r-opinst.c
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m68hc11-dis.c
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m68hc11-opc.c
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m68k-dis.c
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m68k bfd.h tidy
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2019-09-23 10:27:22 +09:30 |
m68k-opc.c
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Use the correct alias for the M68K tdiv instruction.
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2019-09-10 17:17:01 +01:00 |
m10200-dis.c
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m10200-opc.c
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m10300-dis.c
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m10300-opc.c
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MAINTAINERS
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Makefile.am
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Makefile.in
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Re-generate many configure and Makefile.in files
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2019-09-18 09:09:15 -04:00 |
makefile.vms
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mcore-dis.c
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mcore-opc.h
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mep-asm.c
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mep-desc.c
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mep-desc.h
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mep-dis.c
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mep-ibld.c
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mep-opc.c
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mep-opc.h
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metag-dis.c
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microblaze-dis.c
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microblaze-dis.h
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microblaze-opc.h
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microblaze-opcm.h
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micromips-opc.c
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mips16-opc.c
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mips-dis.c
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mips bfd.h tidy
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2019-09-23 10:27:20 +09:30 |
mips-formats.h
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mips-opc.c
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mmix-dis.c
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Fix a potential buffer overrun in the MMIX disassembler when processing a corrupt input file.
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2019-09-03 09:53:25 +01:00 |
mmix-opc.c
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moxie-dis.c
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moxie-opc.c
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msp430-decode.c
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msp430-decode.opc
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msp430-dis.c
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mt-asm.c
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mt-desc.c
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mt-desc.h
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mt-dis.c
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mt-ibld.c
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mt-opc.c
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mt-opc.h
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nds32-asm.c
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nds32-asm.h
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nds32-dis.c
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nds32-opc.h
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nfp-dis.c
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nios2-dis.c
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nios2-opc.c
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ns32k-dis.c
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opc2c.c
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opintl.h
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or1k-asm.c
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opcodes/or1k: Regenerate opcodes
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2019-06-13 06:16:19 +09:00 |
or1k-desc.c
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opcodes/or1k: Regenerate opcodes
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2019-06-13 06:16:19 +09:00 |
or1k-desc.h
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opcodes/or1k: Regenerate opcodes
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2019-06-13 06:16:19 +09:00 |
or1k-dis.c
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opcodes/or1k: Regenerate opcodes
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2019-06-13 06:16:19 +09:00 |
or1k-ibld.c
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opcodes/or1k: Regenerate opcodes
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2019-06-13 06:16:19 +09:00 |
or1k-opc.c
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opcodes/or1k: Regenerate opcodes
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2019-06-13 06:16:19 +09:00 |
or1k-opc.h
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opcodes/or1k: Regenerate opcodes
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2019-06-13 06:16:19 +09:00 |
or1k-opinst.c
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opcodes/or1k: Regenerate opcodes
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2019-06-13 06:16:19 +09:00 |
pdp11-dis.c
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pdp11-opc.c
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pj-dis.c
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pj-opc.c
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ppc-dis.c
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ppc-opc.c
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Remove the ldmx mnemonic that never made it into POWER9.
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2019-06-12 15:48:53 -05:00 |
pru-dis.c
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pru-opc.c
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riscv-dis.c
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RISC-V: Make objdump disassembly work right for binary files.
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2019-06-26 17:17:09 -07:00 |
riscv-opc.c
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RISC-V: Gate opcode tables by enum rather than string.
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2019-09-17 17:59:08 -07:00 |
rl78-decode.c
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rl78-decode.opc
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rl78-dis.c
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rx-decode.c
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rx-decode.opc
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rx-dis.c
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Fix potential undefined behaviour in the RX disassembler.
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2019-10-25 16:10:04 +01:00 |
s12z-dis.c
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s12z-opc.c
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s12z-opc.h
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s390-dis.c
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s390-mkopc.c
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S/390: Add support for z15 as CPU name.
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2019-10-08 11:24:29 +02:00 |
s390-opc.c
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s390-opc.txt
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score7-dis.c
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score-dis.c
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score-opc.h
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sh-dis.c
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sh-opc.h
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sparc-dis.c
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sparc-opc.c
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spu-dis.c
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spu-opc.c
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stamp-h.in
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sysdep.h
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tic4x-dis.c
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tic6x-dis.c
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tic30-dis.c
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Fix buffer underrun bug in the TI C30 disassembler.
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2019-09-03 15:37:12 +01:00 |
tic54x-dis.c
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tic54x-opc.c
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tic80-dis.c
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tic80-opc.c
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tilegx-dis.c
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tilegx-opc.c
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tilepro-dis.c
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tilepro-opc.c
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v850-dis.c
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v850-opc.c
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vax-dis.c
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visium-dis.c
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visium-opc.c
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wasm32-dis.c
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xc16x-asm.c
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xc16x-desc.c
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xc16x-desc.h
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xc16x-dis.c
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xc16x-ibld.c
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xc16x-opc.c
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xc16x-opc.h
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xgate-dis.c
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xgate-opc.c
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xstormy16-asm.c
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xstormy16-desc.c
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xstormy16-desc.h
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xstormy16-dis.c
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xstormy16-ibld.c
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xstormy16-opc.c
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xstormy16-opc.h
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xtensa-dis.c
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z8k-dis.c
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z8k-opc.h
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z8kgen.c
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z80-dis.c
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