Robert Suchanek 7e96e219a4 [MIPS] Add RDHWR with the SEL field for MIPS R6. ... In Release 6 of the MIPS architecture [1], instruction RDHWR supports a 3rd operand to serve as the 3-bit select field for the hardware register. [1] "MIPS Architecture for Programmers Volume II-A: The MIPS32 Instruction Set Manual", Imagination Technologies Ltd., Document Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 332-334 opcodes/ * mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel. gas/ * testsuite/gas/mips/mips.exp: Run hwr-names test. * testsuite/gas/mips/hwr-names.s: Add test cases for RDHWR with the SEL field. * testsuite/gas/mips/mipsr6@hwr-names.d: New file.		2019-04-09 09:56:48 +00:00
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gas	[MIPS] Add RDHWR with the SEL field for MIPS R6.	2019-04-09 09:56:48 +00:00
lib
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