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034685f9ce
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
102 lines
2.9 KiB
C
102 lines
2.9 KiB
C
/* CRIS v10 simulator support code
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Copyright (C) 2004-2015 Free Software Foundation, Inc.
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Contributed by Axis Communications.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* The infrastructure is based on that of i960.c. */
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#define WANT_CPU_CRISV10F
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#define BASENUM 10
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#define CRIS_TLS_REGISTER 14
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#include "cris-tmpl.c"
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#if WITH_PROFILE_MODEL_P
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/* Model function for u-multiply unit. */
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int
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MY (XCONCAT3 (f_model_crisv,BASENUM,
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_u_multiply)) (SIM_CPU *current_cpu ATTRIBUTE_UNUSED,
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const IDESC *idesc ATTRIBUTE_UNUSED,
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int unit_num ATTRIBUTE_UNUSED,
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int referenced ATTRIBUTE_UNUSED)
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{
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return 1;
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}
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#endif /* WITH_PROFILE_MODEL_P */
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/* Do the interrupt sequence if possible, and return 1. If interrupts
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are disabled or some other lockout is active, return 0 and do
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nothing.
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Beware, the v10 implementation is incomplete and doesn't properly
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lock out interrupts e.g. after special-register access and doesn't
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handle user-mode. */
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int
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MY (deliver_interrupt) (SIM_CPU *current_cpu,
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enum cris_interrupt_type type,
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unsigned int vec)
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{
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unsigned char entryaddr_le[4];
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int was_user;
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SIM_DESC sd = CPU_STATE (current_cpu);
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unsigned32 entryaddr;
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/* We haven't implemented other interrupt-types yet. */
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if (type != CRIS_INT_INT)
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abort ();
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/* We're supposed to be called outside of prefixes and branch
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delay-slots etc, but why not check. */
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if (GET_H_INSN_PREFIXED_P ())
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abort ();
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if (!GET_H_IBIT ())
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return 0;
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/* User mode isn't supported for interrupts. (And we shouldn't see
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this as 1 anyway. The user-mode bit isn't visible from user
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mode. It doesn't make it into the U bit until the next
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interrupt/exception.) */
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if (GET_H_UBIT ())
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abort ();
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SET_H_PBIT (1);
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if (sim_core_read_buffer (sd,
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current_cpu,
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read_map, entryaddr_le,
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GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4, 4) == 0)
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{
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/* Nothing to do actually; either abort or send a signal. */
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sim_core_signal (sd, current_cpu, CPU_PC_GET (current_cpu), 0, 4,
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GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4,
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read_transfer, sim_core_unmapped_signal);
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return 0;
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}
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entryaddr = bfd_getl32 (entryaddr_le);
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SET_H_SR (H_SR_PRE_V32_IRP, GET_H_PC ());
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SET_H_PC (entryaddr);
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return 1;
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}
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