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a49ce729c8
This class implements debug register support common between the i386 and amd64 native targets. While here, remove #ifdef's for HAVE_PT_GETDBREGS in FreeBSD-specific code. The ptrace request has been present on FreeBSD x86 architectures since 4.0 (released in March 2000). The last FreeBSD release without this support is 3.5 released in June 2000.
367 lines
10 KiB
C
367 lines
10 KiB
C
/* Native-dependent code for FreeBSD/i386.
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Copyright (C) 2001-2022 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <sys/sysctl.h>
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#include <sys/user.h>
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#include "i386-tdep.h"
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#include "i386-fbsd-tdep.h"
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#include "i387-tdep.h"
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#include "x86-nat.h"
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#include "gdbsupport/x86-xstate.h"
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#include "x86-fbsd-nat.h"
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class i386_fbsd_nat_target final : public x86_fbsd_nat_target
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{
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public:
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void fetch_registers (struct regcache *, int) override;
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void store_registers (struct regcache *, int) override;
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const struct target_desc *read_description () override;
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void resume (ptid_t, int, enum gdb_signal) override;
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};
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static i386_fbsd_nat_target the_i386_fbsd_nat_target;
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#ifdef PT_GETXSTATE_INFO
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static size_t xsave_len;
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#endif
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static int have_ptrace_xmmregs;
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/* Fetch register REGNUM from the inferior. If REGNUM is -1, do this
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for all registers. */
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void
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i386_fbsd_nat_target::fetch_registers (struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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#if defined(PT_GETFSBASE) || defined(PT_GETGSBASE)
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const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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#endif
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pid_t pid = get_ptrace_pid (regcache->ptid ());
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if (fetch_register_set<struct reg> (regcache, regnum, PT_GETREGS,
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&i386_fbsd_gregset))
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{
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if (regnum != -1)
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return;
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}
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#ifdef PT_GETFSBASE
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if (regnum == -1 || regnum == I386_FSBASE_REGNUM)
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{
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register_t base;
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if (ptrace (PT_GETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
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perror_with_name (_("Couldn't get segment register fs_base"));
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regcache->raw_supply (I386_FSBASE_REGNUM, &base);
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if (regnum != -1)
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return;
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}
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#endif
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#ifdef PT_GETGSBASE
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if (regnum == -1 || regnum == I386_GSBASE_REGNUM)
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{
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register_t base;
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if (ptrace (PT_GETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
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perror_with_name (_("Couldn't get segment register gs_base"));
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regcache->raw_supply (I386_GSBASE_REGNUM, &base);
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if (regnum != -1)
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return;
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}
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#endif
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/* There is no i386_fxsave_supplies or i386_xsave_supplies.
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Instead, the earlier register sets return early if the request
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was for a specific register that was already satisified to avoid
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fetching the FPU/XSAVE state unnecessarily. */
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#ifdef PT_GETXSTATE_INFO
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if (xsave_len != 0)
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{
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void *xstateregs = alloca (xsave_len);
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if (ptrace (PT_GETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, 0) == -1)
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perror_with_name (_("Couldn't get extended state status"));
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i387_supply_xsave (regcache, regnum, xstateregs);
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return;
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}
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#endif
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if (have_ptrace_xmmregs != 0)
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{
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char xmmregs[I387_SIZEOF_FXSAVE];
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if (ptrace(PT_GETXMMREGS, pid, (PTRACE_TYPE_ARG3) xmmregs, 0) == -1)
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perror_with_name (_("Couldn't get XMM registers"));
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i387_supply_fxsave (regcache, regnum, xmmregs);
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return;
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}
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struct fpreg fpregs;
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if (ptrace (PT_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
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perror_with_name (_("Couldn't get floating point status"));
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i387_supply_fsave (regcache, regnum, &fpregs);
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}
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/* Store register REGNUM back into the inferior. If REGNUM is -1, do
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this for all registers. */
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void
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i386_fbsd_nat_target::store_registers (struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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#if defined(PT_GETFSBASE) || defined(PT_GETGSBASE)
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const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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#endif
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pid_t pid = get_ptrace_pid (regcache->ptid ());
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if (store_register_set<struct reg> (regcache, regnum, PT_GETREGS, PT_SETREGS,
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&i386_fbsd_gregset))
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{
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if (regnum != -1)
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return;
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}
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#ifdef PT_SETFSBASE
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if (regnum == -1 || regnum == I386_FSBASE_REGNUM)
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{
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register_t base;
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regcache->raw_collect (I386_FSBASE_REGNUM, &base);
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if (ptrace (PT_SETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
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perror_with_name (_("Couldn't write segment register fs_base"));
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if (regnum != -1)
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return;
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}
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#endif
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#ifdef PT_SETGSBASE
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if (regnum == -1 || regnum == I386_GSBASE_REGNUM)
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{
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register_t base;
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regcache->raw_collect (I386_GSBASE_REGNUM, &base);
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if (ptrace (PT_SETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1)
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perror_with_name (_("Couldn't write segment register gs_base"));
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if (regnum != -1)
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return;
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}
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#endif
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/* There is no i386_fxsave_supplies or i386_xsave_supplies.
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Instead, the earlier register sets return early if the request
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was for a specific register that was already satisified to avoid
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fetching the FPU/XSAVE state unnecessarily. */
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#ifdef PT_GETXSTATE_INFO
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if (xsave_len != 0)
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{
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void *xstateregs = alloca (xsave_len);
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if (ptrace (PT_GETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, 0) == -1)
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perror_with_name (_("Couldn't get extended state status"));
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i387_collect_xsave (regcache, regnum, xstateregs, 0);
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if (ptrace (PT_SETXSTATE, pid, (PTRACE_TYPE_ARG3) xstateregs, xsave_len)
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== -1)
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perror_with_name (_("Couldn't write extended state status"));
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return;
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}
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#endif
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if (have_ptrace_xmmregs != 0)
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{
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char xmmregs[I387_SIZEOF_FXSAVE];
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if (ptrace(PT_GETXMMREGS, pid, (PTRACE_TYPE_ARG3) xmmregs, 0) == -1)
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perror_with_name (_("Couldn't get XMM registers"));
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i387_collect_fxsave (regcache, regnum, xmmregs);
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if (ptrace (PT_SETXMMREGS, pid, (PTRACE_TYPE_ARG3) xmmregs, 0) == -1)
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perror_with_name (_("Couldn't write XMM registers"));
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return;
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}
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struct fpreg fpregs;
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if (ptrace (PT_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
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perror_with_name (_("Couldn't get floating point status"));
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i387_collect_fsave (regcache, regnum, &fpregs);
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if (ptrace (PT_SETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
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perror_with_name (_("Couldn't write floating point status"));
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}
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/* Resume execution of the inferior process. If STEP is nonzero,
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single-step it. If SIGNAL is nonzero, give it that signal. */
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void
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i386_fbsd_nat_target::resume (ptid_t ptid, int step, enum gdb_signal signal)
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{
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pid_t pid = ptid.pid ();
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int request = PT_STEP;
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if (pid == -1)
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/* Resume all threads. This only gets used in the non-threaded
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case, where "resume all threads" and "resume inferior_ptid" are
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the same. */
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pid = inferior_ptid.pid ();
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if (!step)
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{
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struct regcache *regcache = get_current_regcache ();
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ULONGEST eflags;
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/* Workaround for a bug in FreeBSD. Make sure that the trace
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flag is off when doing a continue. There is a code path
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through the kernel which leaves the flag set when it should
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have been cleared. If a process has a signal pending (such
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as SIGALRM) and we do a PT_STEP, the process never really has
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a chance to run because the kernel needs to notify the
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debugger that a signal is being sent. Therefore, the process
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never goes through the kernel's trap() function which would
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normally clear it. */
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regcache_cooked_read_unsigned (regcache, I386_EFLAGS_REGNUM,
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&eflags);
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if (eflags & 0x0100)
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regcache_cooked_write_unsigned (regcache, I386_EFLAGS_REGNUM,
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eflags & ~0x0100);
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request = PT_CONTINUE;
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}
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/* An addres of (caddr_t) 1 tells ptrace to continue from where it
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was. (If GDB wanted it to start some other way, we have already
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written a new PC value to the child.) */
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if (ptrace (request, pid, (caddr_t) 1,
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gdb_signal_to_host (signal)) == -1)
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perror_with_name (("ptrace"));
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}
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/* Support for debugging kernel virtual memory images. */
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#include <machine/pcb.h>
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#include "bsd-kvm.h"
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static int
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i386fbsd_supply_pcb (struct regcache *regcache, struct pcb *pcb)
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{
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/* The following is true for FreeBSD 4.7:
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The pcb contains %eip, %ebx, %esp, %ebp, %esi, %edi and %gs.
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This accounts for all callee-saved registers specified by the
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psABI and then some. Here %esp contains the stack pointer at the
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point just after the call to cpu_switch(). From this information
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we reconstruct the register state as it would look when we just
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returned from cpu_switch(). */
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/* The stack pointer shouldn't be zero. */
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if (pcb->pcb_esp == 0)
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return 0;
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pcb->pcb_esp += 4;
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regcache->raw_supply (I386_EDI_REGNUM, &pcb->pcb_edi);
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regcache->raw_supply (I386_ESI_REGNUM, &pcb->pcb_esi);
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regcache->raw_supply (I386_EBP_REGNUM, &pcb->pcb_ebp);
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regcache->raw_supply (I386_ESP_REGNUM, &pcb->pcb_esp);
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regcache->raw_supply (I386_EBX_REGNUM, &pcb->pcb_ebx);
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regcache->raw_supply (I386_EIP_REGNUM, &pcb->pcb_eip);
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regcache->raw_supply (I386_GS_REGNUM, &pcb->pcb_gs);
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return 1;
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}
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/* Implement the read_description method. */
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const struct target_desc *
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i386_fbsd_nat_target::read_description ()
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{
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#ifdef PT_GETXSTATE_INFO
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static int xsave_probed;
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static uint64_t xcr0;
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#endif
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static int xmm_probed;
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#ifdef PT_GETXSTATE_INFO
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if (!xsave_probed)
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{
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struct ptrace_xstate_info info;
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if (ptrace (PT_GETXSTATE_INFO, inferior_ptid.pid (),
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(PTRACE_TYPE_ARG3) &info, sizeof (info)) == 0)
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{
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xsave_len = info.xsave_len;
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xcr0 = info.xsave_mask;
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}
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xsave_probed = 1;
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}
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if (xsave_len != 0)
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return i386_target_description (xcr0, true);
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#endif
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if (!xmm_probed)
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{
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char xmmregs[I387_SIZEOF_FXSAVE];
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if (ptrace (PT_GETXMMREGS, inferior_ptid.pid (),
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(PTRACE_TYPE_ARG3) xmmregs, 0) == 0)
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have_ptrace_xmmregs = 1;
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xmm_probed = 1;
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}
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if (have_ptrace_xmmregs)
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return i386_target_description (X86_XSTATE_SSE_MASK, true);
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return i386_target_description (X86_XSTATE_X87_MASK, true);
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}
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void _initialize_i386fbsd_nat ();
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void
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_initialize_i386fbsd_nat ()
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{
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add_inf_child_target (&the_i386_fbsd_nat_target);
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/* Support debugging kernel virtual memory images. */
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bsd_kvm_add_target (i386fbsd_supply_pcb);
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}
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